|
|
PDF WED2CG472512V-D2 Data sheet ( Hoja de datos )
| Número de pieza | WED2CG472512V-D2 | |
| Descripción | DUAL KEY DIMM SRAM MODULE | |
| Fabricantes | White Electronic | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de WED2CG472512V-D2 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
White Electronic Designs
WED2CG472512V-D2
ADVANCED*
16MB (4x512Kx72) SYNC / SYNC BURST,
DUAL KEY DIMM SRAM MODULE
FEATURES
DESCRIPTION
4x512Kx72 Synchronous, Synchronous Burst
Flow-Through Architecture
Linear and Sequential Burst Support via MODE pin
Clock Controlled Registered Module Enable (EM#)
Clock Controlled Registered Bank Enables (E1#, E2#,
E3#, E4#)
Clock Controlled Byte Write Mode Enable (BWE#)
Clock Controlled Byte Write Enables (BW1# - BW8#)
Clock Controlled Registered Address
Clock Controlled Registered Global Write (GW#)
Asynchronous Output Enable (G#)
Internally Self-Timed Write
Individual Bank Sleep Mode Enables (ZZ1, ZZ2, ZZ3, ZZ4)
Gold Lead Finish
3.3V ± 10% Operation
Frequency(s): 100, 83, 67, 50MHz
Access Speed(s): tKHQV = 7.5, 9, 10, 12, 15ns
Common Data I/O
High Capacitance (30pF) Drive, at Rated Access Speed
Single Total Array Clock
The WED2CG472512V is a Synchronous/Synchronous
Burst SRAM, 84 position Dual Key; Double High DIMM
(168 contacts) Module, organized as 4x512Kx72. The
Module contains sixteen (16) Synchronous Burst RAM
devices, packaged in the industry standard JEDEC
14mmx20mm TQFP placed on a Multilayer FR4 Substrate.
The Module Architecture is defined as a Sync/SyncBurst,
Flow-Through, with support for either linear or sequential
burst. This Module provides high performance, 2-1-1-1
accesses when used in Burst Mode, and when used in
Synchronous Only Mode, provides a high performance
cost advantage over BiCMOS asynchronous device
architectures.
Synchronous Only operations are performed via strapping
ADSC# Low, and ADSP#/ADV# High, which provides for
Ultra Fast Accesses in Read Mode while providing for
internally self-timed Early Writes.
Synchronous/Synchronous Burst operations are in
relation to an externally supplied clock, Registered
Address, Registered Global Write, Registered Enables as
well as an Asynchronous Output Enable. This Module has
been defined with full flexibility, which allows individual
control of each of the eight bytes, as well as Quad Words
in both Read and Write Operations.
* This product is under development, is not qualified or characterized and is subject to
change or cancellation without notice.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Aug. 2002
Rev. B
1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
1 page  
White Electronic Designs WED2CG472512V-D2
ADVANCED
ABSOLUTE MAXIMUM RATINGS*
Voltage on Vcc Relative to Vss
VIN
Storage Temperature
Operating Temperature (Commercial)
Operating Temperature (Industrial)
Short Circuit Output Current
-0.3V to +4.6V
-0.3V to Vcc +0.5V
-55°C to + 125°C
0°C to +70°C
-40°C to +85°C
100mA
*Stress greater than those listed under “Absolute Maximum Ratings” may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions greater
than those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
Parameter
Sym Min Typ Max Units
Supply Voltage
Vcc
3.3 3.3 3.6
V
Supply Voltage
Vss
0
0
0
V
Input High
VIH 2.0 3.0 Vcc+0.3 V
Input Low
VIL -0.3 0 0.3 V
Input Leakage ILI -2 1 2 mA
Output Leakage
ILo
-2
1
2 mA
DC ELECTRICAL CHARACTERISTICS READ CYCLE
Description
Power Supply Current
Power Supply Current
Device Selected, No Operation
Snooze Mode
CMOS Standby
Clock Running-Deselect
Max
Sym Typ 8.5 10 12 15
Icc1 2.0 2.9 2.7 2.7 2.5
Icc 875 1.8 1.8 1.3 1.3
IccZZ 270 350 350 350 350
Icc3 500 700 700 700 700
IccK 900 1.1 1.1 1.0 1.0
Units
A
A
mA
mA
A
AC TEST LOAD
DQ Output
ZZ00==505Ω0Ω
RL = 50Ω
VL = 1.25V
OUTPUT TEST EQUIVALENCIES
AC TEST CONDITIONS
Input Pulse Levels
Input and Output Timing Ref.
Output Test Equivalencies
Vss to 3.0V
1.25V
See figure at left
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Aug. 2002
Rev. B
5 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet WED2CG472512V-D2.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| WED2CG472512V-D2 | DUAL KEY DIMM SRAM MODULE | White Electronic |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |