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Número de pieza | FDFS2P753Z | |
Descripción | Integrated P-Channel PowerTrench | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
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November 2006
FDFS2P753Z
Integrated P-Channel PowerTrench® MOSFET and Schottky Diode
-30V, -3A, 115mΩ
Features
General Description
Max rDS(on) = 115mΩ at VGS = -10V, ID = -3.0A
Max rDS(on) = 180mΩ at VGS = -4.5V, ID = -1.5A
VF < 500mV @ 1A
VF < 580mV @ 2A
Schottky and MOSFET incorporated into single power surface
mount SO-8 package
Electrically independent Schottky and MOSFET pinout for
design flexibility
The FDFS2P753Z combines the exceptional performance of
Fairchild's PowerTrench MOSFET technology with a very low
forward voltage drop Schottky barrier rectifier in an SO-8
package.
This device is designed specifically as a single package solution
for DC to DC converters. It features a fast switching, low gate
charge MOSFET with very low on-state resistance. The
independently connected Schottky diode allows its use in a
variety of DC/DC converter topologies.
Application
RoHS Compliant
DC - DC Conversion
D
D
C
C
SO-8
Pin 1
G
S
A
A
D5
D6
C7
C8
4G
3S
2A
1A
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDS
VGS
ID
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
Parameter
PD
EAS
VRRM
IO
TJ, TSTG
Power Dissipation
Single Pulse Avalanche Energy
Schotty Repetitive Peak Reverse Voltage
Schotty Average Forward Current
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 1a)
(Note 2)
(Note 1a)
Ratings
-30
±25
-3
-16
1.6
6
-20
-2
-55 to +150
Units
V
V
A
W
mJ
V
A
°C
RθJA
RθJC
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
Package Marking and Ordering Information
(Note 1a)
(Note 1)
78
40
°C/W
Device Marking
FDFS2P753Z
Device
FDFS2P753Z
Package
SO-8
Reel Size
330mm
Tape Width
12mm
Quantity
2500 units
©2006 Fairchild Semiconductor Corporation
FDFS2P753Z Rev.A
1
www.fairchildsemi.com
1 page Typical Characteristics TJ = 25°C unless otherwise noted
10
8 VDD = -5V
800
6 VDD = -10V
4 VDD = -15V 100
f = 1MHz
2 VGS = 0V
Ciss
Coss
Crss
0
0246
-Qg, GATE CHARGE(nC)
Figure 7. Gate Charge Characteristics
8
20
0.1
1 10
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure8. CapacitancevsDrain
to Source Voltage
30
4
3
TJ = 25oC
2
TJ = 125oC
1
0.01
0.1
tAV, TIME IN AVALANCHE(ms)
Figure9. Unclamped Inductive
Switching Capability
1
3.5
3.0
2.5 VGS = -10V
2.0
1.5
1.0 VGS = -4.5V
0.5
RθJA = 78oC/W
0.0
25 50 75 100 125
TA, AMBIENT TEMPERATURE (oC)
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
150
30
10
100us
1 1ms
10ms
0.1
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(on)
0.01
0.1
1
SINGLE PULSE
TJ = MAX RATED
TA = 25OC
10
100ms
1s
10s
DC
80
-VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
200
100 VGS = -10V
10
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
I = I25
1----5---0-1---2-–--5--T----A---
TA = 25oC
1
0.6
10-4
SINGLE PULSE
10-3 10-2 10-1 100 101
t, PULSE WIDTH (s)
102
Figure 12. Single Pulse Maximum
Power Dissipation
103
FDFS2P753Z Rev.A
5 www.fairchildsemi.com
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet FDFS2P753Z.PDF ] |
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