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PDF TEF6701HL Data sheet ( Hoja de datos )
| Número de pieza | TEF6701HL | |
| Descripción | Car radio tuner front-end | |
| Fabricantes | NXP Semiconductors | |
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TEF6701HL
Car radio tuner front-end for digital IF
Rev. 01 — 16 November 2004
Product data sheet
1. General description
The TEF6701HL is a single chip car radio tuner for AM, FM standard, FM In-Band
On-Channel Digital Audio Broadcast (IBOC DAB) and weather band providing gain
controlled output of FM IF and AM IF2 for a car IF DSP IC (e.g. SAA7724H) including the
following functions:
• AM double conversion tuner for LW/MW/SW (31 m, 41 m and 49 m bands) with
IF1 = 10.7 MHz and IF2 = 450 kHz
• FM single conversion tuner to an IF frequency of 10.7 MHz with integrated image
rejection for US FM, Europe FM, Japan FM, East Europe FM and weather band
reception; all bands can be selected using high side or low side Local Oscillator (LO)
injection
• Tuning system includes VCO, crystal oscillator and PLL synthesizer on one chip.
2. Features
s FM mixer for conversion of FM RF (64 MHz to 108 MHz and US weather band) to an
IF of 10.7 MHz; the mixer provides inherent image rejection and can be switched from
low injection to high injection Local Oscillator (LO) via the I2C-bus; two different mixer
conversion gains can be selected via the I2C-bus
s AGC PIN diode drive circuit for FM RF AGC; AGC detection at FM mixer input; the
AGC PIN diode drive can be activated via the I2C-bus as a local function for search
tuning; AGC threshold is a programmable and keyed function switchable via the
I2C-bus
s Digital alignment circuit for bus controlled matching of oscillator tuning voltage to FM
antenna tank circuit tuning voltage
s Buffer output for weather band flag
s FM IF linear amplifier with high dynamic input range; amplifier gain can be switched to
two different positions via the I2C-bus
s FM IF AGC with multiplexed inputs for FM and In-Band On-Channel Digital Audio
Broadcast (IBOC DAB)
s Buffer amplifier for FM IBOC DAB IF bypassing second IF filter can be activated via
I2C-bus
s AM mixer 1 for conversion of AM RF to AM IF1 10.7 MHz
s AM RF PIN diode drive circuit and RF JFET conductance control by AGC cascode
drive circuit; AGC threshold detection at AM mixer 1 and IF2 AGC input; threshold is
programmable via the I2C-bus
s AM noise blanker with blanking at AM IF2; AM noise blanker can be deactivated via
the I2C-bus
s AM mixer 2 for conversion of AM IF1 to AM IF2 450 kHz
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18
AMMIX1IN
17 15
1st AM
MIXER
VAMCAS
VAMCASFB
IAMAGC
TAFAMAGC
TRFAMAGC
MIX1OUT1
MIX1OUT2
19
20
21
22
23
13
14
24
VREFFMMIX
FMMIXIN1
RFGND
FMMIXIN2
WBFLAG
25
26
28
29
30
IFMAGC
31
AGCBUF
AM
RF AGC
90°
GAIN
FM
I/Q MIXER
WB
FM
AGC
threshold
WB/FM/
Japan
AGC
BUFFER
54 46
AM NOISE
DETECTOR
N2
:5/10
:1/:2/:3
N1
11 10 12 9 8 2 1 6 5 4 3
2nd AM
MIXER
AM IF
AGC
64 63
:2
FM
GAIN
IBOC
AM
FM IF
AGC
FM
TEF6701HL
IF
MUX
AM/FM
IF
COUNT
AM/FM
LEVEL
LEVEL
DAA
SEQUENTIAL
CIRCUIT FOR
RDS UPDATING
32
DAAOUT
ANT
DAA
35
TUNING SYSTEM
36 33 34 37
38 39
40 41 42
VCO
43 44 45
POWER
SUPPLY
47 48
7, 27
62
IFOUT
60
XTALGND
XTAL- 59 XTAL2
OSC 58 XTAL1
56
VLEVEL
55
AFHOLD
16 SWPORT1
I2C-
BUS
57 SWPORT2
53
SCL
52
SDA
51 BUSENABLE
50 ADDRSEL
61
IREF
49 VDDA6
coa026
Fig 1. Block diagram.
5 Page 
Philips Semiconductors
TEF6701HL
Car radio tuner front-end for digital IF
8. I2C-bus protocol
8.1 I2C-bus specification
SDA and SCL HIGH and LOW levels are specified according to a 3.3 V I2C-bus. The bus
pins tolerate also thresholds of a 5 V bus.
The standard I2C-bus specification is expanded by the following definitions.
IC addresses:
• 1st IC address C2H: 1100001 R/W
• 2nd IC address C0H: 1100000 R/W
• 3rd IC address C4H: 1100010 R/W.
Structure of the I2C-bus logic: slave transceiver with auto increment.
Subaddresses are not used.
The second I2C-bus address can be selected by connecting pin ADDRSEL via a 120 kΩ
resistor to GND. The third I2C-bus address can be selected by connecting pin ADDRSEL
via a 33 kΩ resistor to GND.
The maximum bit rate for this device is 100 kbit/s.
The I2C-bus interface is extended with an enable input (pin BUSENABLE). If pin
BUSENABLE is HIGH the communication with the device is active; if pin BUSENABLE is
LOW the signals on the I2C-bus are ignored so that higher bit rates (> 100 kbit/s) can be
used to communicate with other devices on the same I2C-bus. The enable signal must not
change while bus communication takes place.
The data hold time tHD;DAT must be at least 1 µs.
No default settings at power-on reset. I2C-bus transmission is required to program the
IC.
8.1.1 Data transfer
Data sequence: address, byte 0, byte 1, byte 2, byte 3, byte 4, byte 5 and byte 6.
The data transfer has to be in this order. The LSB of the address being logic 0 indicates a
write operation.
Bit 7 of each byte is considered the MSB and has to be transferred as the first bit of the
byte.
The data becomes valid at the output of the internal latches with the acknowledge of each
byte. A STOP condition after any byte can shorten transmission times.
When writing to the transceiver by using the STOP condition before completion of the
whole transfer:
• The remaining bytes will contain the old information
• If the transfer of a byte is not completed, this byte is lost and the previous information
is available.
9397 750 13471
Product data sheet
Rev. 01 — 16 November 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
11 of 55
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