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PDF FAN8036 Data sheet ( Hoja de datos )
| Número de pieza | FAN8036 | |
| Descripción | 5-CH Motor Driver + 2-Regulator | |
| Fabricantes | Fairchild Semiconductor | |
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FAN8036
5-CH Motor Driver + 2-Regulator
www.fairchildsemi.com
Features
• 4-CH Balanced Transformerless (BTL) Driver
• 1-CH (Forward Reverse) Control DC Motor Driver
• Operating Supply Voltage (4.5V ~ 13.2V)
• Built in Thermal Shut Down Circuit (TSD)
• Built in Channel Mute Circuit
• Built in Power Save Mode Circuit
• Built in TSD Monitor Circuit
• Built in 2 Regulators
• Built in 2-OP AMPs
Description
The FAN8036 is a monolithic integrated circuit suitable for
a 5-CH motor driver which drives the tracking actuator,
focus actuator, sled motor, spindle motor, and tray motor of
the CDP/CAR-CD/DVDP systems.
48-QFPH-1414
Typical Application
• Compact Disk Player
• Video Compact Disk Player
• Car Compact Disk Player
• Digital Video Disk Player
Ordering Information
Device
Package
FAN8036L 48-QFPH-1414
FAN8036_NL 48-QFPH-1414
Operating Temperature
-35°C ~ +85°C
-35°C ~ +85°C
©2003 Fairchild Semiconductor Corporation
Rev. 1.0.1
1 page  
Internal Block Diagram
FAN8036
IN1- 1
IN1+ OPIN1+ OPIN1- OPOUT1 SVCC VREF
48 47
46 45 44 43
FIN
(GND)
REGVCC
OPIN2+ OPIN2- OPOUT2
PVCC1 DO1+
42 41
40 39 38 37
REGVCC
36 DO1-
OUT1 2
35 DO2+
IN2+ 3
IN2- 4
OUT2 5
REGVCC REGVCC
34 DO2-
33 PGND1
32 REGO1
RES1 6
FIN
(GND)
REGVCC REGVCC
TSD
31 REGO2
FIN
(GND)
RES2 7
REGCTL 8
IN3+ 9
IN3- 10
OUT3 11
IN4+ 12
30 DO3+
29 DO3-
28 DO4+
S
W
M
S
C
+
-
D
D
MUTE123 MUTE4 PS TSD_M
27 DO4-
26 PGND2
25 DO5+
13 14
15 16 17 18
IN4- OUT4 CTL FWD REV SGND
19 20
21 22 23 24
FIN MUTE123 MUTE4 PS TSD_M PVCC2 DO5-
(GND)
5
5 Page 
FAN8036
Electrical Characteristics
(SVCC =5V, PVCC1 = PVCC2 = 8V, TA = 25°C, unless otherwise specified)
Parameter
Quiescent Circuit Current
Power Save On Current
Power Save On Voltage
Power Save Off Voltage
Mute123 On Voltage
Mute123 Off Voltage
Mute4 On Voltage
Mute4 Off Voltage
BTL DRIVER CIRCUIT
Output Offset Voltage
Maximum Output Voltage1
Maximum Output Voltage2
Closed-loop Voltage Gain
Ripple Rejection Ratio*note2
Slew Rate*note2
INPUT OPAMP CIRCUIT
Input Offset Voltage1
Input Bias Current1
High Level Output Voltage1
Low Level Output Voltage1
Output Sink Current1
Output Source Current1
Common Mode Input Range1*note2
Open Loop Voltage Gain1*note2
Ripple Rejection Ratio1*note2
Common Mode Rejection Ratio1*note2
Slew Rate1*note2
Symbol
ICC
IPS*note1
VPSON
VPSOFF
VMON123
VMOFF123
VMON4
VMOFF4
VOO
VOM1
VOM2
AVF
RR
SR
VOF1
IB1
VOH1
VOL1
ISINK1
ISOU1
Vicm1
GVO1
RR1
CMRR1
SR1
Conditions
Under no-load
Under no-load
Pin21 = Variation
Pin21 = Variation
Pin19 = Variation
Pin19 = Variation
Pin20 = Variation
Pin20 = Variation
VIN = 2.5V
RL = 10Ω, CH1,2
RL = 18Ω, CH3,4,5
VIN = 0.1Vrms
VIN = 0.1Vrms, f = 120Hz
Square, Vout = 4Vp-p
-
-
-
-
RL = 50Ω
RL = 50Ω
-
VIN = −75dB
VIN = −20dB, f = 120Hz
VIN = −20dB
Square, Vout = 3Vp-p
Min.
-
-
-
2
-
2
-
2
Typ.
20
-
-
-
-
-
-
-
Max.
-
1
0.5
-
0.5
-
0.5
-
Unit
mA
mA
V
V
V
V
V
V
-100 - +100 mV
4.5 6.0
-
V
5.5 6.5
-
V
16.8 18 19.2 dB
- 60 - dB
1 2 - V/µs
-10 - +10 mV
- - 400 nA
4.4 4.7
-
V
- 0.2 0.5 V
1 2 - mA
1 2 - mA
-0.3 - 4.0 V
- 80 - dB
- 65 - dB
- 80 - dB
- 1.5 - V/µs
Note :
1. When the voltage at pin 39 goes below 0.5V, the power save circuit makes the main bias current sources stop operating. As
a result, the whole circuits are disable. ( The whole circuits mean the driver circuit, the input OP amp circuit, and the normal
OP amp circuit.)
2. Guaranteed field.(No EDS/Final test)
11
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet FAN8036.PDF ] | |
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