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PDF AN2526NFH Data sheet ( Hoja de datos )

Número de pieza AN2526NFH
Descripción Automotive LCD TV signal processor IC
Fabricantes Panasonic Semiconductor 
Logotipo Panasonic Semiconductor Logotipo



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ICs for TV
AN2526NFH
Automotive LCD TV signal processor IC
I Overview
The AN2526NFH is a video signal processing IC with
an LCD's 5 V-source driving power supply for TFT color
LCD (normally white type), and it supports NTSC and
PAL systems. The main circuitry of this IC includes video-
signal processing circuit, color signal processing circuit,
interface circuit, synchronizing circuit and many color
quality adjusting circuits. This IC converts the composite
video signal or separated Y/C signal or RGB signals into
RGB signals available for TFT color LCD.
I Features
Supply voltage: 5 V/7.5 V
Built-in LCD's 5 V-source driving power supply
Low consumption power (typ. 260 mW)
Supporting NTSC and PAL
Supporting composite, component and color differen-
tial signal input
Video signal analog RGB (2 systems)
One is for OSD (analog/digital).
Each mode setting is possible with 3-wire or I2C Bus
control.
Electronic volume (D/A converter) built in
Contrast/Brightness/γ correction circuit built in
Horizontal and vertical display position adjustment are
possible by serial control.
Package: QFP-64HP10L (10 × 10 × 1.95 mm)
Difference from the AN2526FH
Compared to the AN2526FH, the sync. system gain is
increased in no signal input. This may cause the picture
on the screen to be swaying horizontally. So we cannot
recommend this IC to be used in the set with no-signal
input mode.
I Applications
4 inches to 7 inches middle size TFT LCD equipment
of normally white, of such as in-car TV, an LCD monitor
for car navigation system.
12.00±0.20
10.00±0.20
48 33
49 32
Unit: mm
64
1
(1.25)
17
0.50
16
0.18+−00..1005
(1.00)
Seating plane
0° to 10°
0.50±0.20
QFP064-P-1010
Note) The package of this product will be changed
to lead-free type (QFP064-P-1010A). See the
new package dimensions section later of this
datasheet.
Publication date: November 2001
SDB00080AEB
1

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AN2526NFH pdf
AN2526NFH
I Pin Descriptions
Pin No.
Description
Pin No.
1 VCC1 (5.0 V)
2 Reference voltage pin
33
34
3 R-ch. clamp detection pin
35
4 G-ch. clamp detection pin
36
5 B-ch. clamp detection pin
37
6 R-ch. decoder output pin
38
7 G-ch. decoder output pin
39
8 B-ch. decoder output pin
40
9 R-ch. analog signal input pin
41
10 G-ch. analog signal input pin
42
11 B-ch. analog signal input pin
43
12 R-ch. analog/character signal input pin 44
13
G-ch. analog/character signal input pin
45
14 B-ch. analog/character signal input pin 46
15 Black level indication control signal input pin 47
16 Character picking up pulse input pin
48
17 B-ch. output pin
49
18
B-ch. output DC feedback detection pin
50
19 G-ch. output pin
51
20 VCC2 (7.5 V)
52
21 Drive output reference potential input pin 53
22 GND 1
54
23
G-ch. output DC feedback detection pin
55
24 R-ch. output pin
56
25
R-ch. output DC feedback detection pin
57
26 Common reverse signal output pin
58
27 Testing pulse input pin
59
28 Testing clock input pin
60
29 Field identification signal output pin
61
30 Composite synchronous signal output pin 62
31 Vertical synchronous signal output pin 63
32 Horizontal synchronous signal output pin 64
Description
PWM output pin
Power-on reset detection pin
Vertical synchronous signal input pin
1H reverse signal input pin
Clock-system GND (VSS)
Clamp pulse input pin
DAC monitor pin
Clock-system power supply (3.0 V)
GND 2
Analog imposing control signal input pin
AFC loop filter connecting pin
VCO frequency adjustment pin
Synchronous signal input pin
Serial/I2C Bus switching pin
Serial data shift clock input pin
Serial data input pin
Serial data write pulse input pin
ACC detection pin
ACC input pin
Horizontal clock detection pin
Chroma killer detection pin
APC detection pin
VXO input pin
VXO output pin
Y-system clamp detection pin
Chroma trap filter connection pin
GND 3
Luminance signal input pin
R-Y output pin
B-Y output pin
R-Y input pin
B-Y input pin
SDB00080AEB
5

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AN2526NFH arduino
AN2526NFH
I Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min Typ Max Unit
Y-system (continued)
R-ch. black level width
WCHRRB SG2 (NTSC), ch.1 = "E0", ch.2 = "40" 2.25 3.75 µs
ch.5 = "80", ch.12 = "FF", ch.14 = "40"
ch.8/10/11/15 adjustment, Pin 16 = SG7
G-ch. black level width
WCHRGB SG2 (NTSC), ch.1 = "E0", ch.2 = "40" 2.25 3.75 µs
ch.5 = "80", ch.12 = "FF", ch.14 = "40"
ch.8/10/11/15 adjustment, Pin 16 = SG7
B-ch. black level width
WCHRBB SG2 (NTSC), ch.1 = "E0", ch.2 = "40" 2.25 3.75 µs
ch.5 = "80", ch.12 = "FF", ch.14 = "40"
ch.8/10/11/15 adjustment, Pin 16 = SG7
R-ch. CHR threshold 1
VtCHR1 SG2 (NTSC), ch.1 = "E0", ch.2 = "40" 1.5   V[p-p]
ch.5 = "80", ch.12 = "FF", ch.14 = "40"
ch.8/10/11/15 adjustment, Pin12 = 1 V
G-ch. CHR threshold 1
VtCHG1 SG2 (NTSC), ch.1 = "E0", ch.2 = "40" 1.5   V[p-p]
ch.5 = "80", ch.12 = "FF", ch.14 = "40"
ch.8/10/11/15 adjustment, Pin13 = 1 V
B-ch. CHR threshold 1
VtCHB1 SG2 (NTSC), ch.1 = "E0", ch.2 = "40" 1.5   V[p-p]
ch.5 = "80", ch.12 = "FF", ch.14 = "40"
ch.8/10/11/15 adjustment, Pin14 = 1 V
R-ch. CHR threshold 2
VtCHR2 SG2 (NTSC), ch.1 = "E0", ch.2 = "40" 3.0   V[p-p]
ch.5 = "80", ch.12 = "FF", ch.14 = "40"
ch.8/10/11/15 adjustment, Pin 12 = 2.2 V
G-ch. CHR threshold 2
VtCHG2 SG2 (NTSC), ch.1 = "E0", ch.2 = "40" 3.0   V[p-p]
ch.5 = "80", ch.12 = "FF", ch.14 = "40"
ch.8/10/11/15 adjustment, Pin 13 = 2.2 V
B-ch. CHR threshold 2
VtCHB2 SG2 (NTSC), ch.1 = "E0", ch.2 = "40" 3.0   V[p-p]
ch.5 = "80", ch.12 = "FF", ch.14 = "40"
ch.8/10/11/15 adjustment, Pin 14 = 2.2 V
R-ch. white level
CHRRW SG2 (NTSC), ch.1 = "E0", ch.2 = "40" 2.0   V[p-p]
ch.5 = "80", ch.12 = "FF", ch.14 = "40"
ch.8/10/11/15 adjustment, Pin 12 = SG7
G-ch. white level
CHRGW SG2 (NTSC), ch.1 = "E0", ch.2 = "40" 2.0   V[p-p]
ch.5 = "80", ch.12 = "FF", ch.14 = "40"
ch.8/10/11/15 adjustment, Pin 13 = SG7
B-ch. white level
CHRBW SG2 (NTSC), ch.1 = "E0", ch.2 = "40" 2.0   V[p-p]
ch.5 = "80", ch.12 = "FF", ch.14 = "40"
ch.8/10/11/15 adjustment, Pin 14 = SG7
R-ch. white level width
WCHRRW SG2 (NTSC), ch.1 = "E0", ch.2 = "40" 2.25 3.75 µs
ch.5 = "80", ch.12 = "FF", ch.14 = "40"
ch.8/10/11/15 adjustment, Pin 12 = SG7
G-ch. white level width
WCHRGW SG2 (NTSC), ch.1 = "E0", ch.2 = "40" 2.25 3.75 µs
ch.5 = "80", ch.12 = "FF", ch.14 = "40"
ch.8/10/11/15 adjustment, Pin 13 = SG7
SDB00080AEB
11

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