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PDF DS15BR400 Data sheet ( Hoja de datos )

Número de pieza DS15BR400
Descripción (DS15BR400 / DS15BR401) 4-Channel LVDS Buffer / Repeater
Fabricantes National Semiconductor 
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No Preview Available ! DS15BR400 Hoja de datos, Descripción, Manual

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September 2006
DS15BR400/DS15BR401
4-Channel LVDS Buffer/Repeater with Pre-Emphasis
General Description
The DS15BR400/DS15BR401 are four channel LVDS buffer/
repeaters capable of datarates of up to 2 Gbps. High speed
data paths and flow-through pinout minimize internal device
jitter and simplify board layout, while pre-emphasis over-
comes ISI jitter effects from lossy backplanes and cables.
The differential inputs interface to LVDS, and Bus LVDS
signals such as those on National’s 10-, 16-, and 18- bit Bus
LVDS SerDes, as well as CML and LVPECL. The differential
inputs and outputs of the DS15BR400 are internally termi-
nated with 100resistors to improve performance and mini-
mize board space. The DS15BR401 does not have input
termination resistors. The repeater function is especially
useful for boosting signals for longer distance transmission
over lossy cables and backplanes.
The DS15BR400/DS15BR401 are powered from a single
3.3V supply and consume 578 mW (typ). They operate over
the full -40˚C to +85˚C industrial temperature range and are
available in space saving LLP-32 and TQFP-48 packages.
Features
n DC to 2 Gbps low jitter, high noise immunity, low power
operation
n 6 dB of pre-emphasis drives lossy backplanes and
cables
n LVDS/CML/LVPECL compatible input, LVDS output
n On-chip 100 output termination, optional 100 input
termination
n 15 kV ESD protection on LVDS inputs and outputs
n Single 3.3V supply
n Industrial -40 to +85˚C temperature range
n Space saving LLP-32 or TQFP-48 packages
n Evaluation Kit Available
Applications
n Cable extention applications
n Signal repeating and buffering
n Digital routers
Typical Application
© 2006 National Semiconductor Corporation DS201889
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DS15BR400 pdf
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Electrical Characteristics (Continued)
Over recommended operating supply and temperature ranges unless other specified.
Symbol
Parameter
Conditions
Min
LVDS OUTPUT DC SPECIFICATIONS (OUTn±)
VOD Differential Output Voltage, RL = 100external resistor between OUT+ and OUT−
0% Pre-emphasis (Note 6) Figure 1
VOD
Change in VOD between
Complementary States
VOS
VOS
Offset Voltage (Note 7)
Change in VOS between
Complementary States
COUT
IOS
LVDS Output Capacitance
Output Short Circuit Current
OUT+ or OUT− to VSS
OUT+ or OUT− Short to GND
OUT+ or OUT− Short to VDD
SUPPLY CURRENT (Static)
ICC Supply Current
All inputs and outputs enabled and active, terminated
with differential load of 100between OUT+ and OUT-.
PEM = L
ICCZ
Supply Current - Power
Down Mode
PWDN = L, PEM = L
SWITCHING CHARACTERISTICS — LVDS OUTPUTS
tLHT Differential Low to High
Use an alternating 1 and 0 pattern at 200 Mbps, measure
Transition Time (Note 12) between 20% and 80% of VOD.
tHLT Differential High to Low
Figures 2, 4
Transition Time (Note 12)
tPLHD
tPHLD
Differential Low to High
Propagation Delay
Differential High to Low
Propagation Delay
Use an alternating 1 and 0 pattern at 200 Mbps, measure
at 50% VOD between input to output.
Figures 2, 3
tSKD1
tSKCC
Pulse Skew (Note 12)
Output Channel to Channel
Skew (Note 12)
|tPLHD– tPHLD|
Difference in propagation delay (tPLHD or tPHLD) among
all output channels.
tSKP Part to Part Skew (Note 12) Common edge, parts at same temp and VCC
tJIT Jitter (0% Pre-emphasis) RJ - Alternating 1 and 0 at 750 MHz (Note 9)
(Note 8)
DJ - K28.5 Pattern, 1.5 Gbps (Note 10)
TJ - PRBS 223-1 Pattern, 1.5 Gbps (Note 11)
tON LVDS Output Enable Time Time from PWDN to OUT± change from TRI-STATE to
active.
Figures 5, 6
tOFF LVDS Output Disable Time Time from PWDN to OUT± change from active to
TRI-STATE.
Figures 5, 6
250
−35
1.05
−35
Typ
(Note
5)
Max
Units
360 500 mV
35 mV
1.18 1.475 V
35 mV
2.5 pF
−21 −40 mA
6 40 mA
175 215 mA
20 200 µA
170 250 ps
170 250 ps
1.0 2.0 ns
1.0 2.0 ns
10 60 ps
25 75 ps
550 ps
0.5 1.5 ps
14 30 ps
14 31 ps
20 µs
12 ns
Note 5: Typical parameters are measured at VDD = 3.3V, TA = 25˚C. They are for reference purposes, and are not production-tested.
Note 6: Differential output voltage VOD is defined as ABS(OUT+–OUT−). Differential input voltage VID is defined as ABS(IN+–IN−).
Note 7: Output offset voltage VOS is defined as the average of the LVDS single-ended output voltages at logic high and logic low states.
Note 8: Jitter is not production tested, but guaranteed through characterization on a sample basis.
Note 9: Random Jitter, or RJ, is measured RMS with a histogram including 1500 histogram window hits. Stimulus and fixture Jitter has been subtracted. The input
voltage = VID = 500 mV, input common mode voltage = VICM = 1.2V, 50% duty cycle at 750 MHz, tr = tf = 50 ps (20% to 80%).
Note 10: Deterministic Jitter, or DJ, is a peak to peak value. Stimulus and fixture jitter has been subtracted. The input voltage = VID = 500 mV, input common mode
voltage = VICM = 1.2V, K28.5 pattern at 1.5 Gbps, tr = tf = 50 ps (20% to 80%). The K28.5 pattern is repeating bit streams of (0011111010 1100000101).
Note 11: Total Jitter, or TJ, is measured peak to peak with a histogram including 3500 window hits. Stimulus and fixture Jitter has been subtracted. The input voltage
= VID = 500 mV, input common mode voltage = VICM = 1.2V, 223-1 PRBS pattern at 1.5 Gbps, tr = tf = 50 ps (20% to 80%).
Note 12: Not production tested. Guaranteed by a statistical analysis on a sample basis at the time of characterization.
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DS15BR400 arduino
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
32-LLP
(See AN-1187 for PCB Design and Assembly Recommendations)
NS Package Number SQA32A
Order Number DS15BR400TSQ, DS15BR401TSQ (1000 piece Tape and Reel)
DS15BR400TSQX, DS15BR401TSQX (4500 piece Tape and Reel)
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform when
properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result
in a significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
BANNED SUBSTANCE COMPLIANCE
National Semiconductor follows the provisions of the Product Stewardship Guide for Customers (CSP-9-111C2) and Banned Substances
and Materials of Interest Specification (CSP-9-111S2) for regulatory environmental compliance. Details may be found at:
www.national.com/quality/green.
Lead free products are RoHS compliant.
National Semiconductor
Americas Customer
Support Center
Tel: 1-800-272-9959
www.national.com
National Semiconductor
Europe Customer Support Center
Fax: +49 (0) 180-530 85 86
Deutsch Tel: +49 (0) 69 9508 6208
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Support Center
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