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PDF ADV7320 Data sheet ( Hoja de datos )
| Número de pieza | ADV7320 | |
| Descripción | (ADV7320 / ADV7321) Multiformat 216 MHz Video Encoder | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ADV7320 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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Multiformat 216 MHz
Video Encoder with Six NSV® 12-Bit DACs
ADV7320/ADV7321
FEATURES
High definition (HD) input formats
16-/20-, 24-/30-bit (4:2:2, 4:4:4) parallel YCrCb
Fully compliant with
SMPTE 274M (1080i, 1080p @ 74.25 MHz)
SMPTE 296M (720p)
SMPTE 240M (1035i)
RGB in 3-bit × 10-bit 4:4:4 input format
HDTV RGB supported
RGB, RGBHV
Other HD formats using async timing mode
Enhanced definition (ED) input formats
8-/10-, 16-/20-, 24-/30-bit (4:2:2, 4:4:4) parallel YCrCb
SMPTE 293M (525p)
BTA T-1004 EDTV2 (525p)
ITU-R BT.1358 (625p/525p)
ITU-R BT.1362 (625p/525p)
RGB in 3-bit × 10-bit 4:4:4 input format
Standard definition (SD) input formats
CCIR-656 4:2:2 8-/10-bit or 16-/20-bit parallel input
HD output formats
YPrPb HDTV (EIA 770.3)
RGB, RGBHV
CGMS-A (720p/1080i)
ED output formats
Macrovision® Rev 1.2 (525p/625p) (ADV7320 only)
CGMS-A (525p/625p)
YPrPb progressive scan (PS) (EIA-770.1, EIA-770.2)
RGB, RGBHV
SD output formats
Composite NTSC M/N
Composite PAL M/N/B/D/G/H/I, PAL-60
SMPTE 170M NTSC-compatible composite video
ITU-R BT.470 PAL-compatible composite video
S-video (Y/C)
EuroScart RGB
Component YPrPb (Betacam, MII, SMPTE/EBU N10)
Macrovision Rev 7.1.L1 (ADV7320 only)
CGMS/WSS
Closed captioning
GENERAL FEATURES
Simultaneous SD/HD or PS/SD inputs and outputs
Oversampling up to 216 MHz
Programmable DAC gain control
Sync outputs in all modes
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
On-board voltage reference
Six 12-bit NSV (noise shaped video) precision video DACs
2-wire serial I2C® interface, open-drain configuration
Dual I/O supply 2.5 V/3.3 V operation
Analog and digital supply 2.5 V
On-board PLL
64-lead LQFP package
Lead (Pb) free product
APPLICATIONS
EVD (enhanced versatile disk) players
High-end SD/PS DVD recorders/players
SD/PS/HDTV display devices
SD/HDTV set top boxes
Professional video systems
FUNCTIONAL BLOCK DIAGRAM
Y9–Y0
C9–C0
S9–S0
HSYNC
VSYNC
BLANK
CLKIN_A
CLKIN_B
STANDARD DEFINITION
CONTROL BLOCK
COLOR CONTROL
BRIGHTNESS
DNR
GAMMA
PROGRAMMABLE
FILTERS
SD TEST PATTERN
D
E PROGRAMMABLE
M RGB MATRIX
U
X
TIMING
GENERATOR
HIGH DEFINITION
CONTROL BLOCK
HD TEST PATTERN
COLOR CONTROL
ADAPTIVE FILTER CTRL
SHARPNESS FILTER
PLL
ADV7320/
ADV7321
12-BIT
DAC
O 12-BIT
V DAC
E
R
S
A
12-BIT
DAC
M
P 12-BIT
L DAC
I
N 12-BIT
G DAC
12-BIT
DAC
I2C
INTERFACE
Figure 1.
GENERAL DESCRIPTION
The ADV®7320/ADV7321 are high speed, digital-to-analog
encoders on single monolithic chips. They include six high
speed NSV video DACs with TTL-compatible inputs. They have
separate 8-/10-, 16-/20-, and 24-/30-bit input ports that accept
data in high definition (HD) and/or standard definition (SD)
video format. For all standards, external horizontal, vertical,
and blanking signals, or EAV/SAV timing codes, control the
insertion of appropriate synchronization signals into the digital
data stream and, therefore, the output signal.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
1 page  
ADV7320/ADV7321
HD PIXEL
INPUT
CLKIN_B
P_HSYNC
P_VSYNC
P_BLANK
S_HSYNC
S_VSYNC
S_BLANK
CLKIN_A
SD PIXEL
INPUT
Y
DE-
INTER- CR
LEAVE
CB
TEST
PATTERN
SHARPNESS
AND
ADAPTIVE
FILTER
CONTROL
Y COLOR
CR COLOR
CB COLOR
4:2:2
TO
4:4:4
TIMING
GENERATOR
TIMING
GENERATOR
DE- CB
INTER- CR
LEAVE
Y
TEST
PATTERN
DNR
GAMMA
CLOCK
CONTROL
AND PLL
COLOR
SYNC
CONTROL INSERTION
U
UV SSAF
V
RGB
MATRIX
LUMA
AND
CHROMA
FILTERS
2× OVER-
SAMPLING
FSC
MODU-
LATION
Figure 2. Detailed Functional Block Diagram
PS 8× DAC
HDTV 2×
DAC
DAC
CGMS
WSS
DAC
SD 16× DAC
DAC
TERMINOLOGY
SD: standard definition video, conforming to
ITU-R BT.601/ITU-R BT.656.
HD: high definition video, that is, 720p/1080i/1035i.
EDTV: enhanced definition television (525p/625p).
PS: progressive scan video, conforming to SMPTE 293M,
ITU-R BT.1358, BTA T-1004 EDTV2, or ITU-R BT.13621362.
HDTV: high definition television video, conforming to SMPTE
274M, or SMPTE 296M and SMPTE 240M.
YCrCb SD, PS, or HD component: digital video.
YPrPb SD, PS, or HD component: analog video.
Rev. A | Page 5 of 88
5 Page 
ADV7320/ADV7321
CLKIN_A
CONTROL
INPUTS
P_VSYNC,
P_HSYNC,
P_BLANK
Y9–Y0
t9 t10
Cb0 Y0 Cr0 Y1
Crxxx
Yxxx
CONTROL
OUTPUTS
t12
t11
t13
t14
t9 = CLOCK HIGH TIME
t10 = CLOCK LOW TIME
t11 = DATA SETUP TIME
t12 = DATA HOLD TIME
t13 = HD OUTPUT ACCESS TIME
t14 = HD OUTPUT HOLD TIME
Figure 7. PS 4:2:2 10-Bit Interleaved at 54 MHz HSYNC /VSYNC Input Mode (Input Mode 111)
CLKIN_B*
t9 t10
Y9–Y0
3FF 00 00 XY Cb0 Y0 Cr0 Y1
t12
t11
CONTROL
OUTPUTS
t12
t11
t13
t9 = CLOCK HIGH TIME
t10 = CLOCK LOW TIME
t11 = DATA SETUP TIME
t12 = DATA HOLD TIME
t13 = HD OUTPUT ACCESS TIME
t14 = HD OUTPUT HOLD TIME
t14
*CLKIN_B USED IN THIS PS ONLY MODE.
Figure 8. PS Only 4:2:2 10-Bit Interleaved at 27 MHz EAV/SAV Input Mode (Input Mode 100)
CLKIN_A
t9 t10
Y9–Y0
3FF 00
00 XY Cb0 Y0 Cr0
CONTROL
OUTPUTS
t12
t11
t13
t14
t9 = CLOCK HIGH TIME
t10 = CLOCK LOW TIME
t11 = DATA SETUP TIME
t12 = DATA HOLD TIME
t13 = HD OUTPUT ACCESS TIME
t14 = HD OUTPUT HOLD TIME
NOTES
1. Y0, Cb0 SEQUENCE AS PER SUBADDRESS 0x01 BIT 1.
Figure 9. PS Only 4:2:2 10-Bit Interleaved at 54 MHz EAV/SAV Input Mode (Input Mode 111)
Y1
Rev. A | Page 11 of 88
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADV7320.PDF ] | |
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