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PDF IDT74FCT2240AT Data sheet ( Hoja de datos )
| Número de pieza | IDT74FCT2240AT | |
| Descripción | FAST CMOS OCTAL BUFFER/LINE DRIVER | |
| Fabricantes | Integrated Device Technology | |
| Logotipo |  |
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IDT74FCT2240AT/CT
FASTCMOSOCTALBUFFER/LINEDRIVER
FAST CMOS OCTAL
BUFFER/LINE DRIVER
INDUSTRIALTEMPERATURERANGE
IDT74FCT2240AT/CT
FEATURES:
• A and C grades
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility:
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
• Meets or exceeds JEDEC standard 18 specifications
• Resistor outputs (-15mA IOH, 12mA IOL)
• Reduced system switching noise
• Available in SOIC and QSOP packages
DESCRIPTION:
The IDT octal buffer/line driver is built using an advanced dual metal
CMOS technology. The FCT2240T is designed to be employed as a
memory and address driver, clock driver, and bus-oriented transmitter/
receiver which provides improved board density.
The FCT2240T has balanced output drive with current limiting resistors.
This offers low ground bounce, minimal undershoot, and controlled output
fall times, reducing the need for external series terminating resistors. The
FCT2240T is a plug-in replacement for the FCT240T.
FUNCTIONAL BLOCK DIAGRAM
OEA
DA0
OB0
DA1
OB1
DA2
OB2
DA3
OB3
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
© 2002 Integrated Device Technology, Inc.
DataSheet4 U .com
1
OEB
OA0
DB0
OA1
DB1
OA2
DB2
OA3
DB3
JUNE 2002
DSC-5585/2
1 page  
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IDT74FCT2240AT/CT
FASTCMOSOCTALBUFFER/LINEDRIVER
TEST CIRCUITS AND WAVEFORMS
INDUSTRIALTEMPERATURERANGE
V CC
VIN
Pulse
Generator
D.U.T
.
RT
VOUT
500Ω
50pF
500Ω
CL
Octal link
Test Circuits for All Outputs
7.0V
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Switch
Closed
Open
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
tSU
tSU
tH
tREM
tH
Set-Up, Hold, and Release Times
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
Octal link
LOW-HIGH-LOW
PULSE
HIGH-LOW-HIGH
PULSE
tW
Pulse Width
1.5V
1.5V
Octal link
SAME PHASE
INPUT TRANSITION
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
Propagation Delay
3V
1.5V
0V
VOH
1.5V
VOL
3V
1.5V
0V
Octal link
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
ENABLE
DISABLE
3V
1.5V
tPZL
0V
tPLZ
SWITCH
CLOSED
tPZH
3.5V
1.5V
tPHZ
3.5V
0.3V VOL
SWITCH
OPEN
1.5V
0V
0.3V VOH
0V
Octal link
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
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| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet IDT74FCT2240AT.PDF ] | |
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