PDF ICS9DB106 Data sheet ( Hoja de datos )

Número de pieza	ICS9DB106
Descripción	6 Output PCI Express Buffer
Fabricantes	Integrated Circuit Systems
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Hay una vista previa y un enlace de descarga de ICS9DB106 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas
No Preview Available ! www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS9DB106 Preliminary Product Preview 6 Output PCI Express* Buffer with CLKREQ# Function Recommended Application: Pin Configuration 1-to-6 Zero-delay or fanout buffer for PCI Express PLL_BW 1 28 VDDA Output Features: CLK_INT 2 • 6 - 0.7V current mode differential output pairs (HSCL) CLK_INC 3 • SMBus for complete device control CLKREQ1# 4 PCIEXT0 5 27 GNDA 26 IREF 25 CLKREQ4# 24 PCIEXT5 Key Specifications: • Cycle-to-cycle jitter < 40ps • Output-to-output skew < 30 ps PCIEXC0 6 VDD 7 GND 8 PCIEXT1 9 23 PCIEXC5 22 VDD 21 GND 20 PCIEXT4 Features/Benefits: • CLKREQ# pin for outputs 1 and 4/output enable for Express Card applications PCIEXC1 10 PCIEXT2 11 PCIEXC2 12 19 PCIEXC4 18 PCIEXT3 17 PCIEXC3 • PLL or bypass mode/PLL can dejitter incoming clock VDD 13 16 VDD • Selectable PLL bandwidth/minimizes jitter peaking in SMBDAT 14 15 SMBCLK downstream PLL’s • Spread Spectrum Compatible/tracks spreading input Note: clock for low EMI Pins preceeded by '' have internal 120K ohm pull down resistors • SMBus Interface/unused outputs can be disabled 28-pin SSOP & TSSOP 0833A—07/26/04 Other names and brands may be claimed as the property of others. PRODUCT PREVIEW documents contain information on new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. DataSheet4 U .com 1 page www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS9DB106 Preliminary Product Preview Electrical Characteristics - PCIEX 0.7V Current Mode Differential Outputs TA = 0 - 70°C; VDD = 3.3 V +/-5%; CL =2pF, RS=33.2η , RP=49.9η Ρ REFηΡ 9, PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES Current Source Output Impedance Zo1 VO = Vx 3000 η1 Voltage High Voltage Low VHigh VLow Statistical measurement on single ended signal using oscilloscope math function. 660 -150 850 1,3 mV 150 1,3 Max Voltage Min Voltage Vovs Vuds Measurement on single ended signal using absolute value. -300 1150 mV Crossing Voltage (abs) Vcross(abs) 250 550 mV Crossing Voltage (var) d-Vcross Variation of crossing over all edges 140 mV Long Accuracy ppm see Tperiod min-max values 0 ppm Average period Tperiod 100.00MHz nominal 100.00MHz spread 9.9970 9.9970 10.0030 10.0533 ns ns Absolute min period Tabsmin 100.00MHz nominal/spread 9.8720 ns Rise Time tr VOL = 0.175V, VOH = 0.525V 175 700 ps Fall Time tf VOH = 0.525V VOL = 0.175V 175 700 ps Rise Time Variation d-tr 125 ps Fall Time Variation d-tf 125 ps Input to Output Delay Duty Cycle tpd tpdbyp dt3 PLL Mode. Bypass mode Measurement from differential wavefrom 100 3.2 45 150 ps 3.7 ns 55 % Output-to-Output Skew tsk3 VT = 50% PLL mode, 30 ps Jitter, Cycle to cycle t jc y c -c y c Measurement from differential wavefrom 40 ps BYPASS mode as additive jitter 25 ps 1Guaranteed by design and characterization, not 100% tested in production. 2 All Long Term Accuracy and Clock Period specifications are guaranteed with the assumption that the input clock complies with CK409/CK410 accuracy requirements 3IREF = VDD/(3xRR). For RR = 475η (1%), IREF = 2.32mA. IOH = 6 x IREF and VOH = 0.7V @ ZO=50η . 1,3 1,3 1,3 1,3 1,2 2 2 1,2 1 1 1 1 1 1 1 1 1 1 0833A—07/26/04 DataSheet4 U .com 5 5 Page

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