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PDF ICS9DB104 Data sheet ( Hoja de datos )

Número de pieza ICS9DB104
Descripción Four Output Differential Buffer
Fabricantes Integrated Circuit Systems 
Logotipo Integrated Circuit Systems Logotipo



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No Preview Available ! ICS9DB104 Hoja de datos, Descripción, Manual

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Integrated
Circuit
Systems, Inc.
Four Output Differential Buffer for PCI-Express
ICS9DB104
Recommended Application:
DB400 Intel Yellow Cover part with PCI-Express support.
Output Features:
• 4 - 0.7V current-mode differential output pairs
• Supports zero delay buffer mode and fanout mode
• Bandwidth programming available
Key Specifications:
• Outputs cycle-cycle jitter: < 50ps
• Outputs skew: < 50ps
• +/- 300ppm frequency accuracy on output clocks
Features/Benefits:
• Supports tight ppm accuracy clocks for Serial-ATA
• Spread spectrum modulation tolerant, 0 to -0.5% down
spread and +/- 0.25% center spread
• Supports undriven differential output pair in PD# and
SRC_STOP# for power management.
Pin Configuration
VDD 1
SRC_IN 2
SRC_IN# 3
GND 4
VDD 5
DIF_1 6
DIF_1# 7
OE_1 8
DIF_2 9
DIF_2# 10
VDD 11
BYPASS#/PLL 12
SCLK 13
SDATA 14
28 VDDA
27 GNDA
26 IREF
25 GND
24 VDD
23 DIF_6
22 DIF_6#
21 OE_6
20 DIF_5
19 DIF_5#
18 VDD
17 HIGH_BW#
16 SRC_STOP#
15 PD#
28-pin SSOP & TSSOP
0767C—07/19/04
DataSheet4 U .com

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ICS9DB104 pdf
www.DataSheet4U.com
Integrated
Circuit
Systems, Inc.
ICS9DB104
Electrical Characteristics - DIF 0.7V Current Mode Differential Pair
TA = 0 - 70°C; VDD = 3.3 V +/-5%; CL =2pF, RS=33.2, RP=49.9Ω, ΙREF = 475Ω
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Current Source Output
Impedance
Zo1
VO = Vx
3000
Voltage High
Voltage Low
VHigh
VLow
Statistical measurement on single
ended signal using oscilloscope
math function.
660
-150
850
mV
150
Max Voltage
Min Voltage
Vovs
Vuds
Measurement on single ended
signal using absolute value.
-300
1150
mV
Crossing Voltage (abs) Vcross(abs)
250 550 mV
Crossing Voltage (var)
d-Vcross
Variation of crossing over all
edges
140 mV
Long Accuracy
ppm see Tperiod min-max values
0 ppm
200MHz nominal
4.9985
5.0015 ns
200MHz spread
4.9985
5.0266 ns
166.66MHz nominal
5.9982
6.0018 ns
Average period
Tperiod
166.66MHz spread
133.33MHz nominal
5.9982
7.4978
6.0320
7.5023
ns
ns
133.33MHz spread
7.4978
5.4000 ns
100.00MHz nominal
9.9970
10.0030 ns
100.00MHz spread
9.9970
10.0533 ns
200MHz nominal
4.8735
ns
Absolute min period
Tabsmin
166.66MHz nominal/spread
133.33MHz nominal/spread
5.8732
7.3728
ns
ns
100.00MHz nominal/spread 9.8720
ns
Rise Time
tr
VOL = 0.175V, VOH = 0.525V
175
700 ps
Fall Time
tf
VOH = 0.525V VOL = 0.175V
175
700 ps
Rise Time Variation
d-tr
125 ps
Fall Time Variation
d-tf
125 ps
Duty Cycle
dt3
Measurement from differential
wavefrom
45
55 %
Skew tsk3 VT = 50%
PLL mode,
50 ps
Jitter, Cycle to cycle
tjcyc-cyc
Measurement from differential
wavefrom
50 ps
BYPASS mode as additive jitter
50 ps
1Guaranteed by design and characterization, not 100% tested in production.
2 All Long Term Accuracy and Clock Period specifications are guaranteed with the assumption that the input clock
complies with CK409/CK410 accuracy requirements
3IREF = VDD/(3xRR). For RR = 475(1%), IREF = 2.32mA. IOH = 6 x IREF and VOH = 0.7V @ ZO=50.
NOTES
1
1,3
1,3
1
1
1
1
1,2
2
2
2
2
2
2
2
2
1,2
1,2
1,2
1,2
1
1
1
1
1
1
1
1
0767C—07/19/04
DataSheet4 U .com
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ICS9DB104 arduino
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Integrated
Circuit
Systems, Inc.
SRC_STOP_3 (SRC_Stop = Driven, PD = Tristate)
SRC_Stop#
PWRDWN#
DIF (Free Running)
DIF# (Free Running)
DIF (Stoppable)
DIF# (Stoppable)
SRC_STOP_4 (SRC_Stop = Tristate, PD = Tristate)
SRC_Stop#
PWRDWN#
DIF (Free Running)
DIF# (Free Running)
DIF (Stoppable)
DIF# (Stoppable)
ICS9DB104
1mS
1mS
0767C—07/19/04
DataSheet4 U .com
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