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PDF LM1229 Data sheet ( Hoja de datos )
| Número de pieza | LM1229 | |
| Descripción | I2C Compatible CMOS TV RGB and Deflection Processor | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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www.DataSheet4U.com
June 2005
LM1229
I2C Compatible CMOS TV RGB and Deflection Processor
General Description
The LM1229 pre-amp is an integrated CMOS CRT RGB
preamp plus horizontal and vertical deflection processing
with an I2C compatible interface for controlling all the param-
eters necessary to directly adjust the gain, contrast and
brightness and geometry of the CRT display.
In the RGB section, the CRT bias is controlled by the three
DAC outputs which are matched to the LM248x integrated
bias clamp ICs. The brightness control operates on the video
channels rather than the bias channels and is designed to
maintain the CRT color temperature through the full range of
adjustment. The On Screen Display inputs accept either
digital or analog input levels. Black level clamping of the
video signal is carried out directly on the AC coupled input
signal into the high impedance preamplifier input, thus elimi-
nating the need for additional clamp capacitors. Blanking
inputs are provided which can accept both horizontal and
vertical flyback inputs for composite blanking of the video. A
vertical blanking output pulse is provided which can drive a
G1 blanking amplifier such as the one in National’s LM2485
clamp IC. The LM1229 RGB outputs are compatible with
National’s high gain drivers (http://www.national.com).
The Deflection section uses a 12.0 MHz resonator and with
it the horizontal processor is capable of locking to seven
different television signal formats, 15.734, 28.1, 31.468,
33.7, 37.9, 45.0, and 48.08 kHz by configuring two external
tri-state pins. The resonator frequency can be scaled up or
down by as much as 5% to accommodate custom scan
frequencies, however all scan modes will be scaled up or
down by the same percentage. Additional inputs are pro-
vided for H and V synchronization, X-Ray protection, V scan
protection, and H and V EHT compensation. Deflection out-
put signals are provided for horizontal drive, variable ampli-
tude vertical ramp, vertical ramp reference voltage, variable
amplitude dynamic focus, and E-W correction with DC level
adjustment for size.
A status register is also provided for the system microcon-
troller to read and check for failure conditions.
The IC is packaged in an industry standard 64 lead LQFP
molded plastic package.
Features
n Fully bus controllable via an I2C compatible interface.
n Contrast control for simultaneously adjusting the RGB
output peak to peak levels.
n Gain controls for aligning the CRT color temperature.
n Color tracking brightness control for maintaining color
temperature throughout the full range of adjustment.
n Black level clamping to ensure output level stability. The
polarity of the logic pulse input is register selectable.
n Digital or analog RGB OSD inputs, with adjustable
transparency available in the digital mode and clamping
in the analog mode for black level stability.
n Choice of four levels of OSD amplitude.
n Window highlight using the OSD Transparency feature.
n ABL input for reducing the video contrast when the CRT
beam current exceeds the predetermined threshold set
by an external resistor.
n Horizontal and/or vertical blanking directly from
deflection signals. The blanking can be disabled, if
desired.
n Matched to National’s driver and clamp IC families
(http://www.national.com).
n Black level output adjustable from 0.5V to 1.4V for
compatibility with NSC CRT driver IC’s with or without
PNP transistor buffers.
n Three DAC outputs for setting CRT cathode bias, which
can be set to full or half scale like the LM1267 series of
preamplifiers.
n Spot killer which blanks the video outputs when VCC
falls below the specified threshold.
n RGB Power Saving Mode with 35% power reduction.
n Support for seven different TV signal formats.
n RGB blanking for scan loss protection.
n I2C control over horizontal and vertical position and size,
pincushion, pin balance, trapezoidal, parallelogram, top
and bottom corner corrections, vertical S and C
correction, and dynamic focus amplitude.
n Programmable duration 5V vertical blanking output
pulse.
n Uses a low cost resonator.
n Status register indicating vertical scan loss, X-Ray,
horizontal flyback and horizontal lock status.
n Blanks the RGB outputs whenever the loss of vertical
scan is detected.
n Independent control over horizontal and vertical sync
input polarities.
Applications
n Television deflection and RGB video processing with
National’s CRT drivers.
© 2005 National Semiconductor Corporation DS201187
DataSheet4 U .com
www.national.com
1 page  
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OSD Electrical Characteristics (Continued)
Unless otherwise noted: TA = 25˚C, VCC = +5.0V. See (Note 7) for Min and Max parameters and (Note 6) for Typicals.
Symbol
Parameter
Conditions
Min Typ Max
BOTH MODES
ILOW
Low input current (OSD and
Enable).
VIN = 0V
−3.0
IHIGH
High input current (OSD and
Enable).
VIN = 5V
.001
SEP10 kHz
SEP10 MHz
Crosstalk from video @ 10 kHz.
Crosstalk from video @ 10 MHz.
See (Note 17).
See (Note 17).
−70
−50
Units
µA
µA
dB
dB
DAC Output Electrical Characteristics
Unless otherwise noted: TA = 25˚C, VCC = +5.0V, VIN = 0.7V, VABL = VCC, CL = 10 pF, Video Outputs = 2.4 VP-P. See (Note 7)
for Min and Max parameters and (Note 6) for Typicals. DAC parameters apply to all 3 DACs.
Symbol
Parameter
Conditions
Min Typ Max Units
VDAC MIN
VDAC MAX MODE 0
Minimum DAC output voltage
Maximum DAC output voltage (full
scale)
Register Value = 0x00
Register Value = 0xFF,
GLOBAL[5] = 0.
0.5 V
4.2 V
VDAC MAX MODE 1
∆VDAC TEMP
Maximum DAC output voltage (half
scale)
DAC output voltage variation with
temperature
Register Value = 0xFF,
GLOBAL[5] = 1.
0˚C < T < 70˚C ambient
2.1 V
0.5 mV/˚C
∆VDAC VCC
DAC output voltage variation with
VCC
4.75V ≤ VCC ≤ 5.25V,
DAC register set to mid-range
(0x7F)
50 mV
Linearity
Linearity of DAC over its range
5%
Monotonicity
Monotonicity of the DAC excluding
dead zones
−0.5
+0.5 LSB
IMAX
Maximum DAC output load current
1.0 mA
Deflection Signal Characteristics
Unless otherwise noted: TA = 25˚C, VCC = +5.0V, VIN = 0.7V, VABL = VCC, CL = 10 pF, See (Note 7) for Min and Max param-
eters and (Note 6) for Typicals.
Symbol
Parameter
Conditions
Min Typ Max Units
fXTL
VHFB
Ceramic resonator input frequency
Switching threshold for detecting
horizontal flyback on pin 18.
12 MHz
2.4 V
tFW
VVFB-DC
VVFB-SW
VX-RAY
Flyback Width
DC bias point of VFB input
Switching threshold for detection
X-Ray Threshold Voltage
Above VX-RAY the HDRIVE output is
disabled (high)
1
1.25
1.75
2.5
3.2
µs
V
V
V
VCCforXRAYRESET
∆fFR
fCR
tHDPHASE
tPARCOR
tBOWCOR
X-Ray Reset
Free-run frequency tolerance
PLL capture range
Horizontal phase control range
Maximum parallelogram correction
Maximum pin balance (bow)
correction
VCC required to reset X-Ray
(ceramic resonator tolerance)
All scan frequencies
Measured at 31 kHz
Measured at 31 kHz
4
±6
±25
±1
±0.5
V
±1 %
%
%TH
µs
µs
HEHT−
HEHT+
HEHT phase shift left (REHT = 20k)
HEHT phase shift right (REHT =
20k)
HEHT[3:0] = 0011b and V20 = 1.5V
HEHT[3:0] = 0111b and V20 = 3.5V
−2.7
2.8
%TH
%TH
VHDOL
HDRIVE Max low level output
IOL = 10 mA
0.7 V
5 www.national.com
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Application Information (Continued)
Pin
Pin Name
No.
10 EWOUT
Schematic
11 FOCUSOUT
VCC & GND
14 HDRIVEOUT
15 SCL
16 SDA
Description
EWOUT is the output used for control of width,
pincushion, trapezoid and top and bottom
corners. Its lowest voltage is in the middle of
vertical scan. The amplitudes of these functions
are register controlled.
FOCUSOUT is used for dynamic focus
adjustment. The peak to peak amplitude is
register controlled and if it is used for both
horizontal and vertical dynamic focus, their
amplitudes will be controlled proportionately.
Power supply and ground pin for all the LM1229.
Note the recommended charge storage and high
frequency capacitors which should be as close to
pins wherever possible.
This is the horizontal drive output. When this
output is low, the horizontal output transistor is
on and a positive edge at pin 14 starts the
flyback pulse. The duty cycle slowly increases to
50% when power is applied. The output sink
current should not exceed 10 mA.
The I2C compatible clock line. A pull-up resistor
of about 4.7 kΩ should be connected between
this pin and VCC. A resistor of at least 100Ω
should be connected in series with the clock line
for additional ESD protection.
The I2C compatible data line. A pull-up resistor of
about 4.7 kΩ should be connected between this
pin and VCC. A resistor of at least 100Ω should
be connected in series with the data line for
additional ESD protection.
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| Páginas | Total 27 Páginas | |
| PDF Descargar | [ Datasheet LM1229.PDF ] | |
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