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PDF MC74AC646 Data sheet ( Hoja de datos )

Número de pieza MC74AC646
Descripción OCTAL TRANSCEIVER/REGISTER WITH 3-STATE OUTPUTS (NON-INVERTING)
Fabricantes Motorola Semiconductors　
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MC74AC646
MC74ACT646
Octal Transceiver/Register with
3ĆState Outputs (NonĆinverting)
The MC74AC646/74ACT646 consist of registered bus transceiver circuits,
with outputs, D-type flip-flops and control circuitry providing multiplexed transmission
of data directly from the input bus or from the internal storage registers. Data on the
A or B bus will be loaded into the respective registers on the LOW-to-HIGH transition
of the appropriate clock pin (CAB or CBA). The four fundamental data handling
functions available are illustrated in the following figures.
OCTAL
TRANSCEIVER/REGISTER
WITH 3-STATE OUTPUTS
(NON-INVERTING)
REAL TIME TRANSFER
A-BUS TO B-BUS
A-BUS
REG REG
B-BUS
Figure 1
REAL TIME TRANSFER
B-BUS TO A-BUS
A-BUS
REG REG
B-BUS
Figure 2
STORAGE
FROM BUS TO REGISTER
A-BUS
REG REG
B-BUS
Figure 3
TRANSFER
FROM REGISTER TO BUS
A-BUS
REG REG
B-BUS
Figure 4
• Independent Registers for A and B Buses
• Multiplexed Real-Time and Stored Data Transfers
• Choice of True and Inverting Data Paths
• 3-State Outputs
• 300 mil Slim Dual In-Line Package
• Outputs Source/Sink 24 mA
• ′ACT646 Has TTL Compatible Inputs
N SUFFIX
CASE 724-03
PLASTIC
DW SUFFIX
CASE 751E-04
SOIC PACKAGE
LOGIC SYMBOL
CAB A0 A1 A2 A3 A4 A5 A6 A7
SAB
DIR
CBA
SBA
G B0 B1 B2 B3 B4 B5 B6 B7
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MC74AC646 pdf
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MC74AC646 MC74ACT646
AC CHARACTERISTICS (For Figures and Waveforms — See Section 3)
74AC
Symbol
Parameter
VCC*
(V)
TA = +25°C
CL = 50 pF
tPLH
Propagation Delay
Clock to Bus
tPHL
Propagation Delay
Clock to Bus
tPLH
Propagation Delay
Bus to Bus
tPHL
Propagation Delay
Bus to Bus
tPLH
Propagation Delay
SBA or SAB to An or Bn
(w/An or Bn HIGH or LOW)
tPHL
Propagation Delay
SBA or SAB to An or Bn
(w/An or Bn HIGH or LOW)
tPZH
Enable Time
G to An or Bn
tPZL
Enable Time
G to An or Bn
tPHZ
Disable Time
G to An or Bn
tPLZ
Disable Time
G to An or Bn
tPZH
Enable Time
DIR to An or Bn
tPZL
Enable Time
DIR to An or Bn
tPHZ
Disable Time
DIR to An or Bn
tPLZ
Disable Time
DIR to An or Bn
* Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
Min Typ Max
3.3 4.0 10.5 16.5
5.0 2.5 7.5 12
3.3 3.0 9.5 14.5
5.0 2.0 6.5 10.5
3.3 2.5 7.5 12
5.0 1.5 5.0 8.0
3.3 1.5 7.5 12.5
5.0 1.5 5.0 9.0
3.3 2.0 8.5 13.5
5.0 1.5 6.0 10
3.3 1.5 8.5 13.5
5.0 1.5 6.0 10
3.3 2.5 7.0 11.5
5.0 1.5 5.0 8.5
3.3 2.5 7.5 12.5
5.0 1.5 5.5 9.0
3.3 3.0 8.0 12.5
5.0 2.0 6.5 10
3.3 2.0 7.5 12
5.0 1.5 6.0 9.5
3.3 2.0 6.5 11
5.0 1.5 5.0 7.5
3.3 2.5 7.0 11.5
5.0 1.5 5.0 8.0
3.3 2.5 7.5 11.5
5.0 1.5 5.5 9.5
3.3 1.5 7.5 12
5.0 1.5 5.5 9.5
74AC
TA = –40°C
to +85°C
CL = 50 pF
Min Max
3.0 18.5
2.0 13
2.5 16
1.5 11.5
2.0 13.5
1.0 9.0
1.5 13.5
1.0 9.5
1.5 15.5
1.5 11
1.5 15
1.5 11
2.0 12.5
1.5 9.0
2.0 14
1.5 10
2.5 13.5
2.0 11
2.0 13.5
1.5 10.5
1.5 12
1.0 8.5
2.0 13
1.0 9.0
1.5 12.5
1.5 10
1.5 13.5
1.5 10.5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Fig.
No.
3-6
3-6
3-5
3-5
3-6
3-6
3-7
3-8
3-7
3-8
3-7
3-8
3-7
3-8
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