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PDF MAX1530 Data sheet ( Hoja de datos )
| Número de pieza | MAX1530 | |
| Descripción | (MAX1530 / MAX1531) Multiple-Output Power-Supply Controllers for LCD Monitors | |
| Fabricantes | Maxim Integrated Products | |
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19-2866; Rev 0; 5/03
Multiple-Output Power-Supply Controllers for
LCD Monitors
General Description
The MAX1530/MAX1531 multiple-output power-supply
controllers generate all the supply rails for thin-film tran-
sistor (TFT) liquid-crystal display (LCD) monitors. Both
devices include a high-efficiency, fixed-frequency,
step-down regulator. The low-cost, all N-channel, syn-
chronous topology enables operation with efficiency as
high as 93%. High-frequency operation allows the use
of small inductors and capacitors, resulting in a com-
pact solution. The MAX1530 includes three linear regu-
lator controllers and the MAX1531 includes five linear
regulator controllers for supplying logic and LCD bias
voltages. A programmable startup sequence enables
easy control of the regulators.
The MAX1530/MAX1531 include soft-start functions to
limit inrush current during startup. An internal step-
down converter current-limit function and a versatile
overcurrent shutdown protect the power supplies against
fault conditions. The MAX1530/MAX1531 use a current-
mode control architecture, providing fast load transient
response and easy compensation. An internal linear
regulator provides MOSFET gate drive and can be
used to power small external loads.
The MAX1530/MAX1531 can operate from inputs as
high as 28V and are well suited for LCD monitor and TV
applications running directly from AC/DC wall adapters.
Both devices are available in a small (5mm x 5mm),
ultra-thin (0.8mm), 32-pin QFN package and operate
over the -40°C to +85°C temperature range.
Applications
LCD Monitors and TVs
Automotive LCDs
PART
MAX1530ETJ
MAX1531ETJ
Ordering Information
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
32 Thin QFN
32 Thin QFN
Pin Configuration appears at end of data sheet.
Features
o 4.5V to 28V Input Voltage Range
o 250kHz/500kHz Current-Mode Step-Down Converter
Small Inductor/Capacitors
No Sense Resistor
o Three Positive Linear Regulator Controllers
One Positive and One Negative Additional
Controller (MAX1531)
Small Input and Output Capacitors
o Timed Reset Output
o Uncommitted Overcurrent Protection (MAX1531)
o Soft-Start for All Regulators
o Programmable Input Undervoltage Comparator
o Programmable Startup Sequencing
Minimal Operating Circuit
VP
VN
VIN = 12V
VOUT
3.3V/1.5A
VOUT
VLOGIC
2.5V/500mA
VL
VP
VGON
25V
VIN
VL CSH
CSL
BST
IN DRV4
DH FBL4
LX
MAX1530
DL
PGND
FB
COMP
EN
ILIM
FREQ
VL
AGND
RESET
RSTIN
DRV1
FBL1
DRV2
FBL2
ONL2
ONL3
ONL4
SEQ ONL5
DRV3
FBL3
DRV5
FBL5
VIN
VSOURCE
10V/500mA
VL
VIN
VGAMMA
9.7V
VN
VGOFF
-9V
VL
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
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Multiple-Output Power-Supply Controllers for
LCD Monitors
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = 12V, VEN = VSEQ = 5V, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
CONDITIONS
Soft-Start Period
FREQ = GND
FREQ = VL
POSITIVE LINEAR REGULATOR (LR4)
FBL4 Regulation Voltage
FBL4 Input Bias Current
VDRV4 = 5V, IDRV4 = 500µA
VFBL4 = 1.5V
FBL4 Effective Load Regulation
Error (Transconductance)
VDRV4 = 5V, IDRV4 = 500µA to 10mA
FBL4 Line Regulation Error
DRV4 Sink Current
DRV4_Off-Leakage Current
IDRV4 = 500µA, 5.5V < VIN < 28V
VFBL4 = 1.175V, VDRV4 = 5V
VFBL4 = 1.5V, VDRV4 = 28V
FBL4 Input Common-Mode
Range
(Note 2)
Soft-Start Step Size
Measured at FBL4
Soft-Start Period
FREQ = GND
FREQ = VL
NEGATIVE LINEAR REGULATOR (LR5)
FBL5 Regulation Voltage
VDRV5 = -10V, IDRV5 = 100µA
FBL5 Input Bias Current
VFBL5 = 0
FBL5 Effective Load Regulation
Error (Transconductance)
VDRV5 = -10V, IDRV5 = 50µA to 1mA
FBL5 Line Regulation Error
DRV5 Source Current
DRV5 Off-Leakage Current
IDRV5 = 100µA, 5.5V < VIN < 28V
VFBL5 = 200mV, VDRV5 = -10V
VFBL5 = 0, VDRV5 = -20V
FBL5 Input Common-Mode
Range
(Note 2)
Soft-Start Step Size
Measured at FBL5
Soft-Start Period
FREQ = AGND
FREQ = VL
MIN TYP MAX
1024 / fOSC
2048 / fOSC
UNITS
s
1.226
-50
1.245
1.264
+50
-1.5 -2
5
10 28
0.1 10
-0.1 +1.5
1.238 / 32
1024 / fOSC
2048 / fOSC
V
nA
%
mV
mA
µA
V
V
s
100 125 150
-50 +50
-1.5 -2
5
29
0.1 10
-0.1 +1.5
1.238 / 32
1024 / fOSC
2048 / fOSC
mV
nA
%
mV
mA
µA
V
V
s
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VIN = 12V, VEN = VSEQ = 5V, TA = -40°C to +85°C, unless otherwise noted.) (Note 3)
PARAMETER
CONDITIONS
MIN
GENERAL
Operating Input Voltage Range (Note 1)
4.5
VL REGULATOR
VL Output Voltage
5.5V < VIN < 28V, 0 < IVL < 30mA
4.75
VL Undervoltage Lockout
Threshold
VL rising, 3% hysteresis
3.2
TYP
MAX UNITS
28.0 V
5.25 V
3.8 V
_______________________________________________________________________________________ 5
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Multiple-Output Power-Supply Controllers for
LCD Monitors
Pin Description (continued)
PIN
MAX1530 MAX1531
12 12
13 13
14 14
15 15
16 16
17 17
20 20
21 21
22 22
NAME
FUNCTION
RESET
Open-Drain Reset Output. RESET asserts low when the monitored voltage is less than the
reset trip threshold. RESET goes to a high-impedance state only after the monitored
voltage remains above the reset trip threshold for the duration of the reset timeout period.
RESET also asserts low when VL is less than the VL undervoltage lockout threshold, EN is
low, or the thermal, overcurrent or undervoltage fault latches are set.
COMP
Step-Down Regulator Compensation Input. A pole-zero pair must be added to
compensate the control loop by connecting a series resistor and capacitor from COMP to
AGND. (See the Compensation Design section.)
Step-Down Regulator Feedback Input. FB regulates at 1.238V nominal. Connect FB to the
FB center tap of a resistive voltage-divider between the step-down regulator output and
AGND to set the output voltage. Place the divider close to the FB pin.
Step-Down Regulator Current-Limit Control Input. Connect this dual-mode input to VL to
set the current-limit threshold to its default value of 250mV. The overcurrent comparator
compares the voltage across the low-side N-channel MOSFET with the current-limit
ILIM threshold. Connect ILIM to the center tap of a resistive voltage-divider between VL and
AGND to adjust the current-limit threshold to other values. In adjustable mode, the actual
current-limit threshold is 1/5th of the voltage at ILIM over a 0.25V to 3.0V range. The dual-
mode threshold for switchover to the 250mV default value is approximately 3.5V.
ONL2
Gamma Linear Regulator (LR2) Enable Input. When EN is above its enable threshold, VL
is above its UVLO threshold, and ONL2 is greater than the internal reference, LR2 is
enabled. Drive ONL2 with a logic signal or, for automatic sequencing, connect a capacitor
from ONL2 to AGND. If SEQ is high, EN is above its threshold, and VL is above its UVLO
threshold, an internal 2µA (typ) current source charges the capacitor. Otherwise, an
internal switch discharges the capacitor. Connecting various capacitors to each ONL_ pin
allows the programming of the startup sequence.
ONL3
PGND
DL
Gate-On Linear Regulator (LR3) Enable Input. When EN is above its enable threshold, VL
is above its UVLO threshold, and ONL3 is greater than the internal reference, LR3 is
enabled. Drive ONL3 with a logic signal or, for automatic sequencing, connect a capacitor
from ONL3 to AGND. If SEQ is high, EN is above its threshold, and VL is above its UVLO
threshold, an internal 2µA (typ) current source charges the capacitor. Otherwise, an
internal switch discharges the capacitor. Connecting various capacitors to each ONL_ pin
allows the programming of the startup sequence.
Power Ground
Low-Side Gate Driver Output. DL drives the synchronous rectifier of the step-down
regulator. DL swings from PGND to VL. DL remains low until VL rises above the UVLO
threshold.
Step-Down Regulator Current-Sense Input. The IC’s current-sense amplifier inputs for
LX current-mode control connect to IN and LX. Connect IN and LX directly to the high-side N-
channel MOSFET drain and source, respectively. The low-side current-limit comparator
inputs connect to LX and PGND to sense voltage across a low-side N-channel MOSFET.
______________________________________________________________________________________ 11
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| PDF Descargar | [ Datasheet MAX1530.PDF ] | |
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