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PDF DP83950B Data sheet ( Hoja de datos )

Número de pieza DP83950B
Descripción Repeater Interface Controller
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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October 1995
DP83950B RICTM
Repeater Interface Controller
General Description
The DP83950B Repeater Interface Controller ‘‘RIC’’ may be
used to implement an IEEE 802 3 multiport repeater unit It
fully satisfies the IEEE 802 3 repeater specification including
the functions defined by the repeater segment partition and
jabber lockup protection state machines
The RIC has an on-chip phase-locked-loop (PLL) for Man-
chester data decoding a Manchester encoder and an Elas-
ticity Buffer for preamble regeneration
Each RIC can connect to 13 cable segments via its network
interface ports One port is fully AUI compatible and is able
to connect to an external MAU using the maximum length of
AUI cable The other 12 ports have integrated 10BASE-T
Y Separate partition state machines for each port
Y Provides port status information for LED displays in-
cluding receive collision partition and link status
Y Power-up configuration options
Repeater and Partition Specifications Transceiver Inter-
face Status Display Processor Operations
Y Simple processor interface for repeater management
and port disable
Y On-chip Event Counters and Event Flag Arrays
Y Serial Management Interface to combine packet and
repeater status information together
Y CMOS process for low power dissipation
Y Single 5V supply
transceivers These transceiver functions may be bypassed
so that the RIC may be used with external transceivers for
Table of Contents
example DP8392 coaxial transceivers In addition large re-
peater units containing several hundred ports may be con- 1 0 SYSTEM DIAGRAM
structed by cascading RICs together over an Inter-RIC bus
2 0 CONNECTION DIAGRAM
The RIC is configurable for specific applications It provides
port status information for LED array displays and a simple
interface for system processors The RIC posseses multi-
function counter and status flag arrays to facilitate network
3 0 PIN DESCRIPTIONS
4 0 BLOCK DIAGRAM
statistics gathering A serial interface known as the Man-
agement Interface is available for the collection of data in 5 0 FUNCTIONAL DESCRIPTION
Managed Hub applications
6 0 HUB MANAGEMENT SUPPORT
Features
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7 0 PORT LOGIC FUNCTIONS
Y Compliant with the IEEE 802 3 Repeater Specification
Y 13 network connections (ports) per chip
8 0 RIC REGISTER DESCRIPTIONS
Y Selectable on-chip twisted-pair transceivers
Y Cascadable for large hub applications
Y Compatible with AUI compliant transceivers
9 0 AC AND DC SPECIFICATIONS
10 0 AC TIMING TEST CONDITIONS
Y On-chip Elasticity Buffer Manchester encoder and de- 11 0 PHYSICAL DIMENSIONS
coder
1 0 System Diagram
Simple RIC Hub
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TRI-STATE is a registered trademark of National Semiconductor Corporation
RICTM and SONICTM are trademarks of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 11096
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DP83950B pdf
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2 0 Connection Diagram 160 Pin PQFP Package (Continued)
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Ports 6 – 13 TP
Ports 1 – 5 AUI
Order Number DP83950BVQB
See NS Package Number VUL160A
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DP83950B arduino
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2 0 Connection Diagram 160 Pin PGA Package (Continued)
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Bottom View
1 AUI a 2 – 13 T P Ports
Order Number DP83950BNU
See NS Package Number UP159A
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