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PDF 89C669 Data sheet ( Hoja de datos )

Número de pieza 89C669
Descripción P89C669
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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P89C669
80C51 8-bit microcontroller family with extended memory;
96 kB Flash with 2 kB RAM
Rev. 02 — 13 November 2003
Product data
1. General description
The P89C669 represents the first Flash microcontroller based on Philips
Semiconductors’ new 51MX core. The P89C669 features 96 kbytes of Flash program
memory and 2 kbytes of data SRAM. In addition, this device is equipped with a
Programmable Counter Array (PCA), a watchdog timer that can be configured to
different time ranges through SFR bits, as well as two enhanced UARTs and byte
based I2C-bus serial interface.
Philips Semiconductors’ 51MX (Memory eXtension) core is an accelerated 80C51
architecture that executes instructions at twice the rate of standard 80C51 devices.
The linear address range of the 51MX has been expanded to support up to 8 Mbytes
of program memory and 8 Mbytes of data memory. It retains full program code
compatibility to enable design engineers to re-use 80C51 development tools,
eliminating the need to move to a new, unfamiliar architecture. The 51MX core also
retains 80C51 bus compatibility to allow for the continued use of 80C51-interfaced
peripherals and Application Specific Integrated Circuits (ASICs).
The P89C669 provides greater functionality, increased performance and overall lower
system cost. By offering an embedded memory solution combined with the
enhancements to manage the memory extension, the P89C669 eliminates the need
for software work-arounds. The increased program memory enables design
engineers to develop more complex programs in a high-level language like C, for
example, without struggling to contain the program within the traditional 64 kbytes of
program memory. These enhancements also greatly improve C Language efficiency
for code size below 64 kbytes.
The P89C669 device contains a non-volatile Flash program memory that is both
parallel programmable and serial In-System and In-Application Programmable.
In-System Programming (ISP) allows the user to download new code while the
microcontroller sits in the application. In-Application Programming (IAP) means that
the microcontroller fetches new program code and reprograms itself while in the
system. This allows for remote programming over a modem link. A default serial
loader (boot loader) program in ROM allows serial In-System programming of the
Flash memory via the UART without the need for a loader in the Flash code. For
In-Application Programming, the user program erases and reprograms the Flash
memory by use of standard routines contained in ROM.
The 51MX core is described in more detail in the 51MX Architecture Reference.

1 page




89C669 pdf
Philips Semiconductors
5. Functional diagram
P89C669
80C51 8-bit microcontroller family with extended memory
VDD
VSS
Address bus 0-7
Data Bus
RXD0
TXD0
INT0
INT1
CEX3/T0
CEX4/T1
WR
RD
RXD1
TXD1
RST
EA/VPP
PSEN
ALE/PROG
Fig 2. Functional diagram.
P89C669
T2
T2EX
ECI
CEX0
CEX1
CEX2
SCL
SDA
Address Bus 16-22
XTAL2
XTAL1
002aaa403
9397 750 12299
Product data
Rev. 02 — 13 November 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
5 of 33

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89C669 arduino
Philips Semiconductors
P89C669
80C51 8-bit microcontroller family with extended memory
7. Functional description
7.1 Flash memory description
The P89C669 contains 96 kbytes of Flash program memory. It is organized as
12 separate blocks, each block containing 8 kbytes.
The P89C669 Flash memory augments EPROM functionality with in-circuit electrical
erasure and programming. The Flash can be read and written as bytes. The Chip
Erase operation will erase the entire program memory. The Block Erase function can
erase any Flash byte block. In-system programming and standard parallel
programming are both available. On-chip erase and write timing generation contribute
to a user friendly programming interface. The P89C669 Flash reliably stores memory
contents even after 10,000 erase and program cycles. The cell is designed to
optimize the erase and programming mechanisms. In addition, the combination of
advanced tunnel oxide processing and low internal electric fields for erase and
programming operations produces reliable cycling. The P89C669 uses a +5 V VPP
supply to perform the Program/Erase algorithms.
Flash internal program memory with Block Erase.
Internal 4 kbytes Boot Flash, containing low-level in-system programming routines
and a default UART loader. User program can call these routines to perform
In-Application Programming (IAP). The BootFlash can be turned off to provide
access to the full 8 Mbytes memory space.
Boot vector allows user provided Flash loader code to reside anywhere in the
Flash memory space. This configuration provides flexibility to the user.
Default loader in BootFlash allows programming via the UART interface without the
need for a user provided loader.
Up to 8 Mbytes of external program memory if the internal program memory is
disabled (EA = 0).
+5 V programming and erase voltage.
Read/Programming/Erase using ISP/IAP:
Byte Programming (20 µs).
Typical quick erase times (including preprogramming time):
Block Erase (8 kbytes) in 1 second.
Full Erase (96 kbytes) in 1 second.
Parallel programming with 87C51-like hardware interface to programmer.
Programmable security for the code in the Flash.
10,000 minimum erase/program cycles for each byte.
10 year minimum data retention.
9397 750 12299
Product data
Rev. 02 — 13 November 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
11 of 33

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