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PDF VG2617405FJ Data sheet ( Hoja de datos )

Número de pieza VG2617405FJ
Descripción CMOS DRAM
Fabricantes Vanguard International Semiconductor 
Logotipo Vanguard International Semiconductor Logotipo



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VIS
VG26(V)(S)17405FJ
Description
4,194,304 x 4 - Bit
CMOS Dynamic RAM
The device CMOS Dynamic RAM organized as 4,194,304 words x 4 bits with extended data out access
mode. It is fabricated with an advanced submicron CMOS technology and designed to operate from a single
5V only or 3.3V oniy power supply. Low voltage operation is more suitable to be used on battery backup,
portable electronic application. A new refresh feature called “self-refresh” is supported and very slow CBR
cycles are being performed. lt is packaged in JEDEC standard 26/24-pin plastic SOJ.
Features
• Single 5V( ±10 %) or 3.3V(+10%,-5%) only power supply
• High speed tRAC acess time: 50/60ns
• Low power dissipation
- Active wode : 5V version 660/605 mW (Mas)
3.3V version 432/396 mW (Mas)
- Standby mode: 5V version 1.375 mW (Mas)
3.3V version 0.54 mW (Mas)
• Extended - data - out(EDO) page mode access
• I/O level: TTL compatible (Vcc = 5V)
LVTTL compatible (Vcc = 3.3V)
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• 2048 refresh cycle in 32 ms(Std.) or 128 ms(S-version)
• 4 refresh modesh:
- RAS only refresh
- CAS - before - RAS refresh
- Hidden refresh
- Self-refresh(S-version)
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Document:1G5-0162
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Rev.1
Page 1

1 page




VG2617405FJ pdf
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VIS
VG26(V)(S)17405FJ
Absolute Maximum Ratings
Parameter
Voltage on any pin relative to Vss
Supply voltage relative to Vss
Short circuit output current
Power dissipation
Operating temperature
Storage temperature
5V
3.3V
5V
3.3V
Symbol
VT
VCC
IOUT
PD
TOPT
TSTG
4,194,304 x 4 - Bit
CMOS Dynamic RAM
Value
-1.0 to + 7.0
-0.5 to + 4.6
-1.0 to + 7.0
-0.5 to + 4.6
50
1.0
0 to + 70
-55 to + 125
Unit
V
V
mA
W
°C
°C
Recommended DC Operating Conditions
Parameter/Condition
Symbol
Supply Voltage
Input High Voltage, all inputs
Input Low Voltage, all inputs
et4U.com
VCC
VIH
VIL
5 Volt Version
3.3 Volt Version
Min Typ Max Min Typ Max
4.5 5.0
5.5 3.15 3.3
3.6
2.4 - VCC + 1.0
-1.0 -
0.8
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2.0
-0.3
- VCC + 0.3
- 0.8
Unit
V
V
V
Capacitance
Ta = 25°C, VCC = 5V ±10 % or 3.3V (+10%,-5%), f = 1MHz
Parameter
Symbol
Typ
Input capacitance (Address)
CI1 -
Input capacitance (RAS, CAS, OE, WE)
CI2
Output capacitance
(Data-in, Data-out)
CI/O
Note: 1. Capacitance measured with effective capacitance measuring method.
2. RAS, CAS = VIH to disable Dout.
Max
5
7
7
Unit
pF
pF
pF
Note
1
1
1, 2
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Document:1G5-0162
DataSheet4 U .com
Rev.1
Page 5

5 Page





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VIS
VG26(V)(S)17405FJ
4,194,304 x 4 - Bit
CMOS Dynamic RAM
Read Cycle
Parameter
Access time from RAS
Access time from CAS
Access time from column address
Access time from OE
Read command setup time
Read command hold time to CAS
Read command hold time to RAS
Output buffer turn-off time
Output buffer turn-off time from OE
Write Cycle
et4U.com
Parameter
Write command setup time
Write command hold time
Write command pulse width
Write command to RAS lead time
Write command to CAS lead time
Data-in setup time
Data-in hold time
WE to Data-in delay
Read- Modify- Write Cycle
Parameter
Read-modify- write cycle time
RAS to WE delay time
CAS to WE dealy time
Column address to WE delay time
OE hold time from WE
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Document:1G5-0162
DataSheet4 U .com
Symbol
tRAC
tCAC
tAA
tOEA
tRCS
tRCH
tRRH
tOFF
tOEZ
VG26(V)(S)17405
-5 -6
Min Max Min Max
- 50
- 60
- 13
- 15
- 25
- 30
- 12
- 15
0
-0
-
0
-0
-
10
- 10
-
0 12
0 15
0 12
0 15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
12
13, 14
14, 15
7
10, 16
16
17
17
VG26(V)(S) 17405
-5 -6
DSaytmaSbohleet4UM.cinom Max
tWCS
0-
Min
0
Max
-
tWCH
8 - 10 -
tWP 8 - 10 -
tRWL
13 - 15 -
tCWL
8 - 10 -
tDS 0 - 0 -
tDH 8 - 10 -
tWED
10 - 10 -
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Notes
7, 18
19
19
DataShee
Symbol
tRWC
tRWD
tCWD
tAWD
tOEH
VG26(V)(S) 17405
-5 -6
Min Max Min Max
108 - 133 -
64 - 77 -
26 - 32 -
39 - 47 -
8 - 10 -
Unit
ns
ns
ns
ns
ns
Notes
18
18
18
Rev.1
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