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PDF TC59SM816BFTL Data sheet ( Hoja de datos )

Número de pieza TC59SM816BFTL
Descripción (TC59SM804BFT - TC59SM816BFT) SDRAM
Fabricantes Toshiba 
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TC59SM816/08/04BFT/BFTL-70,-75,-80
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
4,194,304-WORDS × 4 BANKS × 16-BITS SYNCHRONOUS DYNAMIC RAM
8,388,608-WORDS × 4 BANKS × 8-BITS SYNCHRONOUS DYNAMIC RAM
16,777,216-WORDS × 4 BANKS × 4-BITS SYNCHRONOUS DYNAMIC RAM
DESCRIPTION
TC59SM816BFT/BFTL is a CMOS synchronous dynamic random access memory organized as 4,194,304-words ×
4 banks × 16 bits and TC59SM808BFT/BFTL is organized as 8,388,608 words × 4 banks × 8 bits and The
TC59SM804BFT/BFTL is organized as 16,777,216 words × 4 banks × 4 bits. Fully synchronous operations are
referenced to the positive edges of clock input and can transfer data up to 143M words per second. These devices
are controlled by commands setting. Each bank are kept active so that DRAM core sense amplifiers can be used as
a cache. The refresh functions, either Auto Refresh or Self Refresh are easy to use. By having a programmable
Mode Register, the system can choose the most suitable modes which will maximize its performance. These devices
are ideal for main memory in applications such as work-stations.
FEATURES
PARAMETER
TC59SM816/M808/M804
-70 -75 -80
tCK Clock Cycle Time (min)
7 ns 7.5 ns 8 ns
tRAS Active to Precharge Command Period (min)
40 ns
45 ns
48 ns
tAC Access Time from CLK (max)
5.4 ns
5.4 ns
6 ns
tRC Ref/Active to Ref/Active Command Period (min)
56 ns
65 ns
68 ns
ICC1 Operation Current (max) (Single bank)
80 mA
75 mA
70 mA
ICC4 Burst Operation Current (max)
100 mA
95 mA
90 mA
ICC6 Self-Refresh Current (max)
3 mA
3 mA
3 mA
Single power supply of 3.3 V ± 0.3 V
Up to 143 MHz clock frequency
Synchronous operations: All signals
referenceDdattoaSthheepeot4siUti.vceoemdges
of
clock
Architecture:
Pipeline
Organization
TC59SM816BFT/BFTL: 4,194,304 words × 4 banks × 16 bits
TC59SM808BFT/BFTL: 8,388,608 words × 4 banks × 8 bits
TC59SM804BFT/BFTL: 16,777,216 words × 4 banks × 4 bits
Programmable Mode register
Auto Refresh and Self Refresh
Burst Length:
1, 2, 4, 8, Full page
CAS Latency:
2, 3
Single Write Mode
Burst Stop Function
Byte Data Controlled by LDQM, UDQM (TC59SM816)
8K Refresh cycles/64 ms
Interface:
LVTTL
Package
TC59SM816BFT/BFTL: TSOPII54-P-400-0.80B
TC59SM808BFT/BFTL: TSOPII54-P-400-0.80B
TC59SM804BFT/BFTL: TSOPII54-P-400-0.80B
000707EBA2
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the
buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and
to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or
damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the
most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling
Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy
control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document
shall be made at the customer’s own risk.
DataSheet4U.com
2001-06-11 1/49
DataShee
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TC59SM816BFTL pdf
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TC59SM816/08/04BFT/BFTL-70,-75,-80
DC CHARACTERISTICS (VCC = 3.3 V ± 0.3 V, Ta = 0°~70°C)
PARAMETER
OPERATING CURRENT
tCK = min, tRC = min
1 bank operation
Active Precharge command cycling
without burst operation
-70 -75 -80
SYMBOL
UNITS NOTES
MIN MAX MIN MAX MIN MAX
ICC1
80 75 70
3
STANDBY CURRENT
tCK = min, CS = VIH,
VIH/L = VIH(min) / VIL(max),
Bank: Inactive state
CKE = VIH
ICC2
CKE = VIL
(Power Down mode)
ICC2P
40 35 30
111
3
3
STANDBY CURRENT
CLK = VIL, CS = VIH,
VIH/L = VIH(min) / VIL(max),
Bank: Inactive state
CKE = VIH
ICC2S
CKE = VIL
(Power Down mode)
ICC2PS
10 10 10
111
et4U.com
NO OPERATING CURRENT
tCK = min, CS = VIH(min),
Bank: Active state (4 banks)
CKE = VIH
ICC3
CKE = VIL
(Power Down mode)
ICC3P
60 55 50 mA
10 10 10
BURST OPERATING CURRENT
tCK = min
Read/Write command cycling
ICC4
100 95 90
AUTO REFRESH CURRENT
tCK = min, tRC = min
Auto Refresh command cycling
SELF REFRESH CURRENT
Self Refresh mode
CKE = 0.2 V
ICC5
170 160 150
DataSheet4U.com
Standard Products
(BFT)
333
Low Power Version
(BFTL)
ICC6
1.6 1.6 1.6
3, 4
3
DataShee
PARAMETER
INPUT LEAKAGE CURRENT
(0 V VIN VCC, all other pins not under test = 0 V)
OUTPUT LEAKAGE CURRENT
(Output disable, 0 V VOUT VCCQ)
LVTTL OUTPUT H LEVEL VOLTAGE (IOUT = −2 mA)
LVTTL OUTPUT L LEVEL VOLTAGE (IOUT = 2 mA)
SYMBOL
II(L)
IO(L)
VOH
VOL
MIN
5
5
2.4
MAX
5
5
0.4
UNITS NOTES
µA
µA
V
V
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2001-06-11 5/49

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TC59SM816BFTL arduino
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TC59SM816/08/04BFT/BFTL-70,-75,-80
Control Timing of Input Data (TC59SM808/M804)
(Word Mask)
CLK
DQM
DQ0~DQ7
(DQ0~DQ3)*
tCMH
tCMS tCMH
tCMS
tDS tDH
Input
data valid
tDS tDH
Input
data valid
tDS tDH
Input
data valid
tDS tDH
Input
data valid
et4U.com
(Clock Mask)
CLK
CKE
DQ0~DQ7
(DQ0~DQ3)*
tCKH
tCKS tCKH
tCKS
tDS tDH
Input
data valid
tDS tDH
Input
data valid
tDS tDH
Input
data valid
tDS tDH
Input
data valid
DataSheet4U.com
Control Timing of Output Data (TC59SM808/M804)
(Output Enable)
CLK
DQM
DQ0~DQ7
(DQ0~DQ3)*
tCMH
tCMS tCMH
tCMS
tAC
tOH
tAC
tOH
Output
data valid
tHZ
tOH
Output
data valid
tAC
tLZ
Open
tAC
tOH
Output
data valid
DataShee
(Clock Mask)
CLK
tCKH
CKE
tAC
tOH
DQ0~DQ7
(DQ0~DQ3)*
DataSheet4U.com
*: TC59SM804
tCKS tCKH
tAC
tOH
Output
data valid
tCKS
tAC
tOH
Output data valid
tAC
tOH
Output
data valid
2001-06-11 11/49
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