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PDF TC74ACT139F Data sheet ( Hoja de datos )

Número de pieza TC74ACT139F
Descripción Dual 2-to-4 Line Decoder
Fabricantes Toshiba Semiconductor 
Logotipo Toshiba Semiconductor Logotipo



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No Preview Available ! TC74ACT139F Hoja de datos, Descripción, Manual

TC74ACT139P/F/FN/FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74ACT139P,TC74ACT139F,TC74ACT139FN,TC74ACT139FT
Dual 2-to-4 Line Decoder
The TC74ACT139 is an advanced high speed CMOS 2 to 4
LINE DECODER fabricated with silicon gate and double-layer
metal wiring C2MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
This device may be used as a level converter for interfacing
TTL or NMOS to High Speed CMOS. The inputs are compatible
with TTL, NMOS and CMOS output voltage levels.
The active low enable input can be used for gating or it can be
used as a data input for demultiplexing applications.
When the enable input is held “H”, all four outputs are fixed at
a high logic level independent of the other inputs.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
High speed: tpd = 5.5 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 8 µA (max) at Ta = 25°C
Compatible with TTL outputs: VIL = 0.8 V (max)
VIH = 2.0 V (min)
Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
Capability of driving 50
transmission lines.
Balanced propagation delays: tpLH ∼− tpHL
Pin and function compatible with 74F139
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74ACT139P
TC74ACT139F
TC74ACT139FN
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
SOP16-P-300-1.27
SOL16-P-150-1.27
TSSOP16-P-0044-0.65A
: 1.00 g (typ.)
: 0.18 g (typ.)
: 0.18 g (typ.)
: 0.13 g (typ.)
: 0.06 g (typ.)
TC74ACT139FT
1 2006-02-01

1 page




TC74ACT139F pdf
Package Dimensions
TC74ACT139P/F/FN/FT
Weight: 1.00 g (typ.)
5 2006-02-01

5 Page










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