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PDF EMIF03-SIM01 Data sheet ( Hoja de datos )
| Número de pieza | EMIF03-SIM01 | |
| Descripción | 003 LINES EMI FILTER INCLUDING ESD PROTECTION | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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®
A.S.D.TM
EMIF03-SIM01
3 LINES EMI FILTER
INCLUDING ESD PROTECTION
MAIN APPLICATIONS
EMI filtering protection and ESD for :
s SIM Interface (Subscriber identify Module)
DESCRIPTION
The EMIF03-SIM01 is a highly integrated array
designed to suppress EMI / RFI noise in all
systems subjected to electromagnetic
interferences.
The EMIF03-SIM01 flip-chip packaging means the
package size is equal to the die size. That's why
EMIF03-SIM01 is a very small device.
Flip Chip package
PIN CONFIGURATION (Ball side)
Additionally, this filter includes an ESD proDteacttaioSnheet4U.com
circuitry which prevents the protected device from
destruction when subjected to ESD surges up to
15 kV.
A3
A2
BENEFITS
s 3 lines symetrical (I/O) low-pass-filter
s High efficiency in EMI filtering
s Very low PCB space consuming: 1.6 x 1.6 mm2
s Very thin package: 0.65 mm
s High efficiency in ESD suppression on both input
& output PINS (IEC61000-4-2 level 4)
s High reliability offered by monolithic integration
s High reducing of parasitic elements through inte-
gration & wafer level packaging.
B3 B2 B1
C3 C2 C1
COMPLIES WITH THE FOLLOWING STANDARDS :
IEC61000-4-2 15kV (air discharge)
8 kV (contact discharge)
on input & output pins.
DataShee
TM : ASD is a trademark of STMicroelectronics.
July 2002 - Ed: 6A
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Fig. A2: Measurements conditions
50 Ω
Vg
TEST BOARD
EMI03
SIM01
EMIF03-SIM01
50 Ω
et4U.com
ESD PROTECTION
In addition with the filtering the EMIF03-SIM01 is particularly optimized to perform ESD protection.
ESD protection is based on the use of device which clamps at:
Vcl = Vbr + Rd ⋅ Ipp
This protection function is splitted in 2 stages. As shown in Figure A3, the ESD strikes are clamped by the
first stage S1 and then its remaining overvoltage is applied to the second stage through the resistor R.
Such a configuration makes the output voltage very low at the Vout level.
DataSheet4U.com
Fig. A3: ESD clamping behavior
Rg S1 R = 100Ω or 47Ω S2
Vg
ESD Surge
Rd
VBR
Vin Vout
Rd
VBR
EMIF03-SIM01
R load
Device
to be
protected
DataShee
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MARKING and DIE SIZE (typical values)
365
200
EMIF03-SIM01
diam 230
FCT
YWW
®
220
et4U.com
1570
YWW: Date code (year + week code)
PACKING
Ordering code
EMIF03-SIM01
Marking
FCT
Package
Weight
Flip Chip
3.3 mg
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Base qty
5000
Delivery mode
Tape & reel 7”
Note: More packing information are available in the application note AN1235: “Flip-Chip: Package
description and recommendations for use”
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of
use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by
implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied.
STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written ap-
proval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 2002 STMicroelectronics - Printed in Italy - All rights reserved.
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - Finland - France - Germany
Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore
Spain - Sweden - Switzerland - United Kingdom - United States.
http://www.st.com
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11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet EMIF03-SIM01.PDF ] | |
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