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PDF THC63LVD104S Data sheet ( Hoja de datos )

Número de pieza THC63LVD104S
Descripción 112MHz 30Bits Color LVDS Receiver
Fabricantes THine Electronics 
Logotipo THine Electronics Logotipo



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THC63LVD104S Rev.1.0
THC63LVD104S
112MHz 30Bits Color LVDS Receiver
General Description
The THC63LVD104S receiver is designed to support
pixel data transmission between Host and Flat Panel
Display from NTSC up to SXGA resolutions. The
THC63LVD104S converts the LVDS data streams back
into 35bits of CMOS/TTL data with rising edge or fall-
ing edge clock for convenient with a variety of LCD
panel controllers.At a transmit clock frequency of
112MHz, 30bits of RGB data and 5bits of timing and
control data (HSYNC,VSYNC,DE,CNTL1,CNTL2)
are transmitted at an effective rate of 784Mbps per
LVDS channel.Using a 112MHz clock, the data
throughput is 490Mbytes per second.
Features
Wide dot clock range: 8-112MHz suited for NTSC,
VGA, SVGA, XGA, and SXGA
PLL requires no external components
50% output clock duty cycle
TTL clock edge and position programmable(3 step)
Power down mode
Low power single 2.5V CMOS design
TQFP 64pin
Pin compatible with THC63LVD104A
Fail-safe for Open CLK Input
Block Diagram
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LVDS INPUT
RA+/-
RB+/-
RC+/-
RD+/-
RE+/-
RCLK+/-
(8 to112MHz)
CMOS/TTL INPUT
R/F
DK
PD
OE
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Copyright 2004 THine Electronics, Inc. All rights reserved
PLL
1
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CMOS/TTL OUTPUT
7 RA6-RA0
7 RB6-RB0
7 RC6-RC0
7 RD6-RD0
7 RE6-RE0
CLKOUT
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THC63LVD104S pdf
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THC63LVD104S Rev.1.0
Electrical Characteristics
CMOS/TTL DC Specifications
Symbol
VIH
VIL
VIH3
VIM3
VIL3
VOH
VOL
Parameter
High Level Input Voltage
Low Level Input Voltage
High Level Input Voltage
Middle Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
Low Level Output Voltage
IIL Input Leakage Current
Conditions
PD, OE,R/F Pin
3-Level Inputs(DK Pin)
IOH= -2mA
IOL= 2mA
PD, OE,R/F Pin
0V £ VIN £ VCC
3-Level Inputs(DK Pin)
IIL3 3-Level Input Leakage Current 0V £ VIN £ VCC
Min
1.7
GND
2.1
1.05
GND
2.1
VCC=VCC=PVCC=LVCC
Typ Max Units
VCC
V
0.7 V
VCC
1.25 1.45
V
V
0.4 V
V
0.4 V
±10 uA
±10 uA
LVDS Receiver DC Specifications
et4U.com
Symbol
VTH
VTL
IILD
Parameter
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Differential Input High Threshold
VIC= 1.2V
Differential Input Low Threshold
VIC= 1.2V
Differential Input Leakage Current
VIN= 2.4V / 0V
VCC=VCC=PVCC=LVCC
Min Typ Max Units
100 mV
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-100 mV
±200
uA
Supply Current
Symbol
IRCCW
IRCCS
Parameter
Receiver Supply Current
Checker Pattern(Worst Case)
(Fig 2)
Receiver Power Down
Supply Current
Conditions
fCLKOUT=65MHz
fCLKOUT=85MHz
CL=8pF
fCLKOUT=112MHz
PD = L, Ta=RT
VCC=VCC=PVCC=LVCC
Min Typ Max Units
125 mA
152 mA
184 mA
10 uA
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THC63LVD104S arduino
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THC63LVD104S Rev.1.0
Package
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THine
THC63LVD104S
INDEX D
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UNITS: mm
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Copyright 2004 THine Electronics, Inc. All rights reserved
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