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Número de pieza | MAS1017 | |
Descripción | am Receiver ic | |
Fabricantes | Micro Analog Systems | |
Logotipo | ||
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DA1017.002
29 May, 2002
MAS1017
AM Receiver IC
• High Sensitivity
• Very Low Power Consumption
• Wide Supply Voltage Range
• Power Down and Power Up Control
• High Selectivity by Crystal Filter
DESCRIPTION
The MAS1017 AM-Receiver chip is a highly sensitive,
simple to use AM receiver specially intended to
receive time signals in the frequency range from 40
kHz to 100 kHz. There are only a few external
components needed. The circuit has a preamplifier,
wide range automatic gain control, demodulator and
output comparator built in. The output signal can be
processed directly with an additional digital circuitry to
extract the data from the received signal.
FEATURES
APPLICATIONS
• Highly Sensitive AM Receiver
• Time Signal Receiver for DCF77 (Germany)
• Wide Supply Voltage Range
• Very Low Power Consumption
• Power Down and Power Up Control
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• Only a Few External Components Needed
• Wide Frequency Range from 40 kHz to 100 kHz
• High Selectivity by Quartz Crystal Filter
DataShee
BLOCK DIAGRAM
QO
QI
RFI AGC Amplifier
Demodulator
&
Comparator
DCF
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Power Supply/Biasing
VDD VSS PDN PUP
AGC DEC
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SAMPLES IN SBDIL 20 PACKAGE
NC 1
VDD 2
NC 3
DEC 4
AGC 5
NC 6
PUP 7
DCF 8
NC 9
NC 10
20 VSS
19 NC
18 RFI
17 PDN
16 NC
15 QO
14 NC
13 QI
12 NC
11 NC
DA1017.002
29 May, 2002
PIN DESCRIPTION
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Pin Name
NC
VDD
NC
DEC
AGC
NC
PUP
DCF
NC
NC
NC
NC
QI
NC
QO
NC
PDN
RFI
NC
VSS
Pin Type
Function
1
2 P Positive power supply
3
4 AO Demodulator capacitor
5 AO DataASGhCeecta4pUa.ccoitmor
6
7 AI Power up input
8 DO Demodulator output
9
10
11
12
13 AI Quartz filter input
14
15 AO Quartz filter output
16
17 AI Power down input
18 AI Receiver input
19
20 G Power supply ground
Note
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1
2
3
4
Notes:
1) See power down control table on page 2.
- Internal pull-down resistor > 1 MΩ to VSS
2) DCF = VSS when carrier amplitude at maximum; DCF = VDD when carrier amplitude is reduced (25%
modulated)
- the output is a current source/sink with |IOUT| > 5 µA
- at power down the output is high impedance
3) Pin 14 between quartz crystal filter pins must be connected to VSS to eliminate package leadframe parasitic
capacitances disturbing the crystal filter performance. All other NC (Not Connected) pins are also
recommended to be connected to VSS to minimize noise coupling.
4) See power down control logic table on page 2.
- Internal pull-up resistor > 1MΩ to VDD
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5 Page |
Páginas | Total 6 Páginas | |
PDF Descargar | [ Datasheet MAS1017.PDF ] |
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