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PDF KM48C514D Data sheet ( Hoja de datos )

Número de pieza KM48C514D
Descripción 512K x 8-Bit CMOS DRAM
Fabricantes Samsung Electronics 
Logotipo Samsung Electronics Logotipo



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KM48C514D, KM48V514D
CMOS DRAM
512K x 8Bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
This is a family of 524,288 x 8 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random access
of memory cells within the same row. Power supply voltage(+5.0V or +3.3V), Access time(-5,-6,-7), power consumption(Normal or Low
power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only
refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 512Kx8 EDO Mode DRAM
family is fabricated using Samsungs advanced CMOS process to realize high band-width, low power consumption and high reliability.
It may be used as main memory unit for microcomputer, personal computer and portable machines.
FEATURES
• Part Identification
- KM48C514D/DL (5V, 1K Ref.)
- KM48V514D/DL (3.3V, 1K Ref.)
Active Power Dissipation
Speed
-5
-6
-7
3.3V (1K Ref.)
-
255
235
Unit : mW
5V (1K Ref.)
470
385
360
Refresh Cycles
Part VCC Refresh
NO. cycle
C514D 5V
V514D 3.3V
1K
Refresh period
Normal L-ver
16ms 128ms
Performance Range
Speed tRAC tCAC tRC
-5 50ns 15ns 84ns
-6 60ns 15ns 104ns
-7 70ns 20ns 124ns
tHPC
20ns
25ns
30ns
Remark
5V Only
5V/3.3V
5V/3.3V
• Extended Data Out Mode operation
• Byte Read/Write operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in 28-pin SOJ 400mil & TSOP(II) 400mil
packages
DataSheet4UD.cuoaml +5V±10% power supply(5V product)
• Dual +3.3V±0.3V power supply(3.3V product)
FUNCTIONAL BLOCK DIAGRAM
RAS
CAS
W
A0 - A9
A0 - A8
Control
Clocks
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
Row Decoder
Memory Array
524,288 x8
Cells
Column Decoder
Vcc
Vss
Data in
Buffer
Data out
Buffer
DataShee
DQ0
to
DQ7
OE
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DataSheet 4 U .com
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.
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KM48C514D pdf
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KM48C514D, KM48V514D
CMOS DRAM
CAPACITANCE (TA=25°C, VCC=5V or 3.3V, f=1MHz)
Parameter
Symbol
Min
Input capacitance [A0 ~ A9]
CIN1
-
Input capacitance [RAS, CAS, W, OE]
CIN2
-
Output capacitance [DQ0 - DQ7]
CDQ
-
AC CHARACTERISTICS (0°CTA70°C, See note 1,2)
Test condition (5V device) : VCC=5.0V±10%, Vih/Vil=2.4/0.8V, Voh/Vol=2.0/0.8V
Test condition (3.3V device) : VCC=3.3V±0.3V, Vih/Vil=2.2/0.7V, Voh/Vol=2.0/0.8V
Parameter
Symbol
-5*1
Min Max
-6
Min Max
Random read or write cycle time
Read-modify-write cycle time
Access time from RAS
Access time from CAS
Access time from column address
CAS to output in Low-Z
Output buffer turn-off delay from CAS
Transition time (rise and fall)
RAS precharge time
et4U.com RAS pulse width
RAS hold time
CAS hold time
CAS pulse width
RAS to CAS delay time
RAS to column address delay time
CAS to RAS precharge time
Row address set-up time
Row address hold time
Column address set-up time
Column address hold time
Column address to RAS lead time
Read command set-up time
Read command hold time referenced to CAS
Read command hold time referenced to RAS
Write command set-up time
Write command hold time
Write command pulse width
Write command to RAS lead time
Write command to CAS lead time
Note) *1 : 5V only
tRC 84
104
tRWC
116
138
tRAC
50
tCAC
15
tAA 25
tCLZ
3
3
tCEZ
3 13 3
tT 2 50 2
tRP 30
40
tRAS DataS5h0eet4U1.0cKom 60
tRSH
17
17
tCSH
40
50
tCAS
8 10K 10
tRCD
20 35 20
tRAD
15 25 15
tCRP
5
5
tASR
0
0
tRAH
10
10
tASC
0
0
tCAH
8
10
tRAL
25
30
tRCS
0
0
tRCH
0
0
tRRH
0
0
tWCS
0
0
tWCH
10
10
tWP 10
10
tRWL
13
15
tCWL
8
10
60
15
30
13
50
10K
10K
45
30
Max
5
7
7
-7
Min Max
124
163
70
20
35
3
3 18
2 50
50
70 10K
20
60
15 10K
20 50
15 35
5
0
10
0
15
35
0
0
0
0
10
10
15
15
Units
pF
pF
pF
Units Notes
ns
ns
ns 3,4,10
ns 3,4,5
ns 3,10
ns 3
ns 6,12
ns 2
ns
ns
ns DataShee
ns
ns
ns 4
ns 10
ns
ns
ns
ns
ns
ns
ns
ns 8
ns 8
ns 7
ns
ns
ns
ns
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KM48C514D arduino
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KM48C514D, KM48V514D
READ - MODIFY - WRITE CYCLE
CMOS DRAM
et4U.com
VIH -
RAS
VIL -
VIH -
CAS
VIL -
VIH -
A
VIL -
VIH -
W
VIL -
VIH -
OE
VIL -
DQ0 ~ DQ3(7)
VI/OH -
VI/OL -
tRAS
tRWC
tRP
tCRP
tRCD
tASR
tRAD
tRAH
tASC
tCAH
ROW
ADDR
COLUMN
ADDRESS
tRSH
tCAS
tCSH
tAWD
tCWD
tRWL
tCWL
tWP
tRWD
tOEA
DataSheet4U.com
tOLZ
tCLZ
tCAC
tAA
tRAC
tOED
tOEZ
VALID
DATA-OUT
tDS tDH
VALID
DATA-IN
DataShee
Dont care
Undefined
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