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PDF TC74LVX157F Data sheet ( Hoja de datos )
| Número de pieza | TC74LVX157F | |
| Descripción | QUAD 20CHANNEL MULTIPLEXER | |
| Fabricantes | Toshiba Semiconductor | |
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TC74LVX157F/FN/FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74LVX157F,TC74LVX157FN,TC74LVX157FT
Quad 2-Channel Multiplexer
The TC74LVX157F/ FN/ FT is a high-speed CMOS quad
2-channel multiplexer fabricated with silicon gate CMOS
technology. Designed for use in 3-V systems, it achieves
high-speed operation while maintaining the CMOS low power
dissipation.
This device is suitable for low-voltage and battery operated
systems.
This device consist of four 2-input digital multiplexers with
common select and strobe inputs. When the STROBE input is
held H-level, selection of data is inhibited and all the outputs
become L-level. The select decoding determines whether the A or
B inputs get routed to their corresponding Y outputs.
An input protection circuit ensures that 0 to 5 V can be applied
to the input pins without regard to the supply voltage. This
device can be used to interface 5V to 3V systems and two supply
systems such as battery back up. This circuit prevents device
destruction due to mismatched supply and input voltages.
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74LVX157F
TC74LVX157FN
Features
· High-speed: tpd: tpd = 5.1 ns (typ.) (VCC = 3.3 V)
www.DataSheet4U.com· Low power dissipation: ICC = 4 µA (max) (Ta = 25°C)
TC74LVX157FT
· Input voltage level: VIL = 0.8 V (max) (VCC = 3 V)
VIH = 2.0 V (min) (VCC = 3 V)
· Power-down protection provided on all inputs
· Balanced propagation delays: tpLH ≈ tpHL
· Low noise: VOLP = 0.5 V (max)
· Pin and function compatible with 74HC157
Weight
SOP16-P-300-1.27: 0.18 g (typ.)
SOL16-P-150-1.27: 0.12 g (typ.)
TSSOP16-P-0044-0.65: 0.06 g (typ.)
DataSheet4 U .com
1 2001-11-12
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TC74LVX157F/FN/FT
AC Characteristics (input: tr = tf = 3 ns)
Characteristics
Propagation delay time
(A, B-Y)
Symbol Test Condition
VCC (V) CL (pF)
tpLH
tpHL
15
2.7
50
¾
15
3.3 ± 0.3
50
Propagation delay time
(SELECT-Y)
tpLH
tpHL
15
2.7
50
¾
15
3.3 ± 0.3
50
Propagation delay time
( ST -Y)
tpLH
tpHL
15
2.7
50
¾
15
3.3 ± 0.3
50
Output to output skew
tosLH
tosHL
2.7
(Note 1)
3.3 ± 0.3
50
50
Input capacitance
Power dissipation capacitance
CIN
CPD
(Note 2)
(Note 3)
Ta = 25°C
Min Typ. Max
¾ 6.6 12.5
¾ 9.1 16.0
¾ 5.1 7.9
¾ 7.6 11.4
¾ 8.9 16.9
¾ 11.4 20.4
¾ 7.0 11.0
¾ 9.5 14.5
¾ 9.1 17.6
¾ 11.6 21.1
¾ 7.2 11.5
¾ 9.7 15.0
¾ ¾ 1.5
¾ ¾ 1.5
¾ 4 10
¾ 20 ¾
Ta = -40 to
85°C
Min Max
1.0 15.5
1.0 19.0
1.0 9.5
1.0 13.0
1.0 20.5
1.0 24.0
1.0 13.0
1.0 16.5
1.0 20.5
1.0 24.0
1.0 13.5
1.0 17.0
¾ 1.5
¾ 1.5
¾ 10
¾¾
Unit
ns
ns
ns
ns
pF
pF
Note 1: Parameter guaranteed by design.
(tosLH = |tpLHm - tpLHn|, tosHL = |tpHLm - tpHLn|)
www.DataSheet4U.comNote 2: Parameter guaranteed by design.
Note 3:
CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption.
Average operating current can be obtained by the equation:
ICC (opr) = CPD･VCC･fIN + ICC/4 (per bit)
And the total CPD when n pcs. of gate operate can be gained by the following equation:
CPD (total) = 13 + 7･n
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Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| TC74LVX157F | QUAD 20CHANNEL MULTIPLEXER | Toshiba Semiconductor |
| TC74LVX157FN | QUAD 20CHANNEL MULTIPLEXER | Toshiba Semiconductor |
| TC74LVX157FT | QUAD 20CHANNEL MULTIPLEXER | Toshiba Semiconductor |
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