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PDF TC74LCX373F Data sheet ( Hoja de datos )

Número de pieza TC74LCX373F
Descripción LOW VOLTAGE OCTAL D-TYPE LATCH WITH 5V TOLERANT INPUTS AND OUTPUTS
Fabricantes Toshiba Semiconductor 
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TC74LCX373F/FW/FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74LCX373F,TC74LCX373FW,TC74LCX373FT
Low-Voltage Octal D-Type Latch with 5-V Tolerant Inputs and Outputs
The TC74LCX373F/FW/FT is a high-performance CMOS octal
D-type latch. Designed for use in 3.3-V systems, it achieves
high-speed operation while maintaining the CMOS low power
dissipation.
The device is designed for low-voltage (3.3 V) VCC applications,
but it could be used to interface to 5-V supply environment for
both inputs and outputs.
This 8 bit D-type latch is controlled by a latch enable input
(LE) and a output enable input (OE). When the OE input is high,
the eight outputs are in a high-impedance state.
All inputs are equipped with protection circuits against static
discharge.
Note: xxxFW (JEDEC SOP) is not available in
Japan.
TC74LCX373F
TC74LCX373FW
Features
· Low-voltage operation: VCC = 2.0 to 3.6 V
· High-speed operation: tpd = 8.0 ns (max) (VCC = 3.0 to 3.6 V)
· Output current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V)
· Latch-up performance: ±500 mA
· Available in JEDEC SOP, JEITA SOP and TSSOP
www.DataSheet4U.com· Power-down protection provided on all inputs and outputs
TC74LCX373FT
· Pin and function compatible with the 74 series
(74AC/VHC/HC/F/ALS/LS etc.) 373 type
Weight
SOP20-P-300-1.27: 0.22 g (typ.)
SOL20-P-300-1.27: 0.46 g (typ.)
TSSOP20-P-0044-0.65: 0.08 g (typ.)
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1 2002-01-11
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TC74LCX373F pdf
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Dynamic Switching Characteristics
(Ta = 25°C, input: tr = tf = 2.5 ns, CL = 50 pF, RL = 500 W)
TC74LCX373F/FW/FT
Characteristics
Quiet output maximum
dynamic VOL
Quiet output minimum
dynamic VOL
Symbol
Test Condition
VOLP VIH = 3.3 V, VIL = 0 V
|VOLV| VIH = 3.3 V, VIL = 0 V
Capacitive Characteristics (Ta = 25°C)
VCC (V)
3.3
Typ.
0.8
3.3 0.8
Unit
V
V
Characteristics
Input capacitance
Output capacitance
Power dissipation capacitance
Symbol
CIN
COUT
CPD
fIN = 10 MHz
Test Condition
¾
¾
VCC (V)
3.3
3.3
(Note 11) 3.3
Typ.
7
8
25
Unit
pF
pF
pF
Note 11: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption.
Average operating current can be obtained by the equation:
ICC (opr) = CPDVCCfIN + ICC/8 (per bit)
AC Test Circuit
Output
Open
Switch
6.0 V
GND
Parameter
Switch
www.DataSheet4U.comMeasure
tpLH, tpHL
tpLZ, tpZL
Open
6.0 V
CL = 50 pF
RL = 500 W
tpHZ, tpZH
tw, ts, th,
GND
Open
Figure 1
AC Waveform
Input
(LE)
Input
(D)
Output
(Q)
tf 2.5 ns
tr 2.5 ns
tr 2.5 ns
10%
tf 2.5 ns
90%
1.5 V
10%
90%
1.5 V
ts (H) th (H)
1.5 V
tpLH
tpHL
1.5 V
1.5 V
ts (L) th (L)
1.5 V
tpHL
Figure 2 tpLH, tpHL, tw, ts, th
5
DataSheet4 U .com
tw (H)
tpLH
2.7 V
GND
2.7 V
GND
VOH
VOL
2002-01-11
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