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PDF TC74LCX157FN Data sheet ( Hoja de datos )

Número de pieza TC74LCX157FN
Descripción LOW VOLTAGE QUAD 2-CHANNEL MULTIPLEXER WITH 5V TOLERANT INPUTS AND OUTPUTS
Fabricantes Toshiba Semiconductor 
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TC74LCX157F/FN/FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74LCX157F,TC74LCX157FN,TC74LCX157FT
Low Voltage Quad 2-Channel Multiplexer with 5 V Tolerant Inputs and Outputs
The TC74LCX157F/FN/FT is a high-performance CMOS
multiplexer. Designed for use in 3.3-V systems, it achieves
high-speed operation while maintaining the CMOS low power
dissipation.
The device is designed for low-voltage (3.3 V) VCC applications,
but it could be used to interface to 5-V supply environment for
inputs.
It consists of four 2-input digital multiplexers with common
SELECT and ST inputs. When the ST input is held “H” level,
selection of data is inhibited and all the outputs become “L” level.
The SELECT decoding determines whether the A or B inputs get
routed to their corresponding Y outputs.
All inputs are equipped with protection circuits against static
discharge.
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74LCX157F
TC74LCX157FN
Features
· Low-voltage operation: VCC = 2.0 to 3.6 V
· High-speed operation: tpd = 5.8 ns (max) (VCC = 3.0 to 3.6 V)
· Ouput current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V)
www.DataSheet4U.com· Latch-up performance: ±500 mA
TC74LCX157FT
· Available in JEDEC SOP, JEITA SOP and TSSOP
· Power-down protection provided on all inputs and outputs
· Pin and function compatible with the 74 series
(74AC/VHC/HC/F/ALS/LS etc.) 157 type
Weight
SOP16-P-300-1.27: 0.18 g (typ.)
SOL16-P-150-1.27: 0.12 g (typ.)
TSSOP16-P-0044-0.65: 0.06 g (typ.)
DataSheet4 U .com
1 2002-01-11
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TC74LCX157FN pdf
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AC Characteristics (Ta = -40 to 85°C)
TC74LCX157F/FN/FT
Characteristics
Propagation delay time
(A, B-Y)
Propagation delay time
(SELECT-Y)
Propagation delay time
( ST -Y)
Output to output skew
Symbol
Test Condition
Min Max Unit
VCC (V)
tpLH
Figure 1, Figure 2
tpHL
2.7
3.3 ± 0.3
¾
1.5
6.3
5.8
ns
tpLH
Figure 1, Figure 2
tpHL
2.7
3.3 ± 0.3
¾
1.5
8.0
7.0
ns
tpLH
Figure 1, Figure 2
tpHL
2.7
3.3 ± 0.3
¾
1.5
8.0
7.0
ns
tosLH
tosHL
2.7 ¾ ¾
(Note 10)
ns
3.3 ± 0.3 ¾
1.0
Note 10: Parameter guaranteed by design.
(tosLH = |tpLHm - tpLHn|, tosHL = |tpHLm - tpHLn|)
Dynamic Switching Characteristics
(Ta = 25°C, input: tr = tf = 2.5 ns, CL = 50 pF, RL = 500 W)
Characteristics
Quiet output maximum
dynamic VOL
Quiet output minimum
dynamic VOL
Symbol
Test Condition
VOLP VIH = 3.3 V, VIL = 0 V
|VOLV| VIH = 3.3 V, VIL = 0 V
Typ.
VCC (V)
3.3 0.8
3.3 0.8
www.DataSheet4U.comCapacitive Characteristics (Ta = 25°C)
Unit
V
V
Characteristics
Input capacitance
Output capacitance
Power dissipation capacitance
Symbol
CIN
COUT
CPD
fIN = 10 MHz
Test Condition
¾
¾
Typ.
VCC (V)
3.3 7
08
(Note 11) 3.3
25
Unit
pF
pF
pF
Note 11: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPDVCCfIN + ICC
DataSheet4 U .com
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