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PDF TC74LCX138FT Data sheet ( Hoja de datos )
| Número de pieza | TC74LCX138FT | |
| Descripción | LOW VOLTAGE 3-TO-8 LINE DECODER WITH 5V TOLERANT INPUTS AND OUTPUTS | |
| Fabricantes | Toshiba Semiconductor | |
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TC74LCX138F/FN/FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74LCX138F,TC74LCX138FN,TC74LCX138FT
Low-Voltage 3-to-8 Line Decoder with 5-V Tolerant Inputs and Outputs
The TC74LCX138F/FN/FT is a high-performance CMOS 3-to-8
decoder. Designed for use in 3.3-V systems, it achieves high-speed
operation while maintaining the CMOS low-power dissipation.
The device is designed for low-voltage (3.3 V) VCC applications,
but it could be used to interface to 5-V supply environment for
inputs.
When the device is enabled, 3 binary select inputs (A, B and C)
determine which one of the outputs (Y0- Y7) will go low.
When enable input G1 is held low or either G2A or G2B is held
high, decoding function is inhibited and all outputs go high.
G1, G2A, and G2B inputs are provided to ease cascade
connection and for use as an address decoder for memory
systems.
All inputs are equipped with protection circuits against static
discharge.
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74LCX138F
TC74LCX138FN
Features
· Low-voltage operation: VCC = 2.0 to 3.6 V
· High-speed operation: tpd = 6.0 ns (max) (VCC = 3.0 to 3.6 V)
· Ouput current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V)
www.DataSheet4U.com· Latch-up performance: ±500 mA
TC74LCX138FT
· Available in JEDEC SOP, JEITA SOP and TSSOP
· Power-down protection provided on all inputs and outputs
· Pin and function compatible with the 74 series
(74AC/VHC/HC/F/ALS/LS etc.) 138 type
Weight
SOP16-P-300-1.27: 0.18 g (typ.)
SOL16-P-150-1.27: 0.12 g (typ.)
TSSOP16-P-0044-0.65: 0.06 g (typ.)
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1 2002-01-11
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AC Characteristics (Ta = -40 to 85°C)
TC74LCX138F/FN/FT
Characteristics
Symbol
Test Condition
Propagation delay time
(A, B, C- Y )
tpLH
Figure 1, Figure 2
tpHL
Propagation delay time
(G1- Y )
tpLH
Figure 1, Figure 2
tpHL
Propagation delay time
( G2 - Y )
tpLH
Figure 1, Figure 2
tpHL
Output to output skew
tosLH
tosHL
Note 10: Parameter guaranteed by design.
(tosLH = |tpLHm - tpLHn|, tosHL = |tpHLm - tpHLn|)
Min Max Unit
VCC (V)
2.7 ¾ 7.0
3.3 ±
0.3
1.5
6.0
ns
2.7 ¾ 8.0
3.3 ±
0.3
1.5
7.0
ns
2.7 ¾ 7.0
3.3 ±
0.3
1.5
6.0
ns
2.7 ¾ ¾
(Note 10) 3.3 ±
0.3
¾
1.0
ns
Dynamic Switching Characteristics
(Ta = 25°C, input: tr = tf = 2.5 ns, CL = 50 pF, RL = 500 W)
Characteristics
Symbol
Test Condition
Quiet output maximum
dynamic VOL
Quiet output minimum
dynamic VOL
VOLP VIH = 3.3 V, VIL = 0 V
www.DataSheet4U.com|VOLV| VIH = 3.3 V, VIL = 0 V
VCC (V)
3.3
3.3
Typ.
0.8
0.8
Unit
V
V
Capacitive Characteristics (Ta = 25°C)
Characteristics
Input capacitance
Output capacitance
Power dissipation capacitance
Symbol
CIN
COUT
CPD
fIN = 10 MHz
Test Condition
¾
¾
Typ.
VCC (V)
3.3 7
08
(Note 11) 3.3
25
Unit
pF
pF
pF
Note 11: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD･VCC･fIN + ICC
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| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet TC74LCX138FT.PDF ] | |
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| TC74LCX138F | LOW VOLTAGE 3-TO-8 LINE DECODER WITH 5V TOLERANT INPUTS AND OUTPUTS | Toshiba Semiconductor |
| TC74LCX138FN | LOW VOLTAGE 3-TO-8 LINE DECODER WITH 5V TOLERANT INPUTS AND OUTPUTS | Toshiba Semiconductor |
| TC74LCX138FT | LOW VOLTAGE 3-TO-8 LINE DECODER WITH 5V TOLERANT INPUTS AND OUTPUTS | Toshiba Semiconductor |
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