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PDF TDA8592Q Data sheet ( Hoja de datos )

Número de pieza TDA8592Q
Descripción (TDA8592J/Q) I2C Bus Controlled 4 x 50W Power Amplifier
Fabricantes NXP Semiconductors 
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TDA8592J; TDA8592Q
I2C-bus controlled 4 × 50 W power amplifier
Rev. 01 — 8 June 2004
Preliminary data sheet
1. General description
The TDA8592J; TDA8592Q is a complementary quad BTL audio power amplifier made in
the BCDMOS technology. It contains four independent amplifiers in Bridge Tied Load
(BTL) configuration. Through the I2C-bus the diagnostic information of each amplifier and
speaker can be read separately.
Both front and both rear channel amplifiers can be configured independently in line driver
mode with a gain of 20 dB.
2. Features
s I2C-bus control
s Hardware programmable I2C-bus address
s Can drive a 2 load with a battery voltage of up to 16 V and a 4 load with a battery
voltage of up to 18 V
s DC-load detection: open, short and present
s AC-load (tweeter) detection
s Programmable clip detection: 1 % or 3 %
www.DataSheet4U.coms Programmable thermal protection pre-warning
s Independent short-circuit protection per channel
s Low gain line driver mode (20 dB)
s Loss-of-ground and open VP safe
s All outputs protected from short-circuit to ground, to VP, or across the load
s All pins protected from short-circuit to ground
s Soft thermal clipping to prevent audio holes
s Low battery detection.
3. Quick reference data
Table 1:
Symbol
VP1, VP2
Iq
Quick reference data
Parameter
operating supply voltage
quiescent current
Conditions
Min Typ Max Unit
8 14.4 18 V
- 280 400 mA
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TDA8592Q pdf
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Philips Semiconductors
TDA8592J; TDA8592Q
I2C-bus controlled 4 × 50 W power amplifier
Table 3: Pin description …continued
Symbol
Pin Description
OUTRF+
10
channel right front positive output
SVR
11 half supply voltage filter capacitor
INRF
12 channel right front input
INRR
13 channel right rear input
SGND
14 signal ground
INLR
15 channel left rear input
INLF
16 channel left front input
ACGND 17 AC ground
OUTLF+
18
channel left front positive output
PGND3 19 power ground 3
OUTLF
20
channel left front negative output
VP1
OUTLR+
21
22
power supply voltage 1
channel left rear positive output
STB 23 standby or operating mute mode select input
OUTLR
24
channel left rear negative output
PGND4 25 power ground 4
DIAG
26 diagnose and clip detection output; active LOW
TAB 27 heatsink connection, must be connected to ground
www.DataSheet4U.comTo keep the output pins on the front side, shift bending is applied.
7. Functional description
The TDA8592J; TDA8592Q is an audio power amplifier with four independent amplifiers
configured in Bridge Tied Load (BTL) with diagnostic capability. The amplifier diagnostic
functions give information about output offset, load, or short-circuit. Diagnostic functions
are controlled via the I2C-bus. The TDA8592J; TDA8592Q is protected against
short-circuit, over-temperature, open ground and open VP connections. If a short-circuit
occurs at the input or output of a single amplifier, that channel shuts down, and the other
channels continue to operate normally. The channel that has a short-circuit can be
disabled by the microcontroller via the appropriate enable bit of the I2C-bus to prevent any
noise generated by the fault condition from being heard.
7.1 Start-up
When pin STB is LOW, the total quiescent current is low, and the I2C-bus lines are
high-impedance.
When pin STB is HIGH, the I2C-bus is biased and then the TDA8592J; TDA8592Q
performs a power-on reset. When bit D0 of instruction byte IB1 is set, the amplifier is
activated, bit D7 of data byte 2 (power-on reset occurred) is reset, and pin DIAG is no
longer held LOW.
9397 750 13007
Preliminary data sheet
DataSheet4 U .com
Rev. 01 — 8 June 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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TDA8592Q arduino
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Philips Semiconductors
TDA8592J; TDA8592Q
I2C-bus controlled 4 × 50 W power amplifier
Table 5:
Bit
D7 to D2
D1
D0
Instruction byte IB1
Description
-
AC or DC-load detection switch
0 = AC or DC-load detection off; resets DC-load detection bits and AC-load
detection peak current counter
1 = AC or DC-load detection on
amplifier start enable (clear power-on reset flag, D7 of DB2)
0 = amplifier off; pin DIAG remains LOW
1 = amplifier on; when power-on occurs, bit D7 of DB2 is reset and pin DIAG is
released
Table 6: Instruction byte IB2
Bit Description
D7 to D2 -
D1 soft mute all amplifier channels (mute delay 20 ms)
0 = no mute
1 = mute
D0 hard mute all amplifier channels (mute delay 0.4 ms)
0 = no mute
www1 =.DmuteataSheet4U.com
Table 7:
Bit
D7
Instruction byte IB3
Description
clip detection level
0 = 4 % detection level
1 = 1 % detection level
D6 amplifier front channels gain select
0 = 26 dB (normal mode)
1 = 20 dB (line driver mode)
D5 amplifier rear channels gain select
0 = 26 dB (normal mode)
1 = 20 dB (line driver mode)
D4 amplifier thermal protection pre-warning
0 = warning level on 145 °C
1 = warning level on 122 °C
D3 disable RF channel
0 = RF channel enabled
1 = RF channel disabled
D2 disable LF channel
0 = LF channel enabled
1 = LF channel disabled
9397 750 13007
Preliminary data sheet
DataSheet4 U .com
Rev. 01 — 8 June 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
11 of 33
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