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PDF KS57C2304 Data sheet ( Hoja de datos )

Número de pieza KS57C2304
Descripción (KS57x230x) Microcontroller
Fabricantes Samsung Electronics 
Logotipo Samsung Electronics Logotipo



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No Preview Available ! KS57C2304 Hoja de datos, Descripción, Manual

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KS57C2302/C2304/P2304 MICROCONTROLLER
1 PRODUCT OVERVIEW
PRODUCT OVERVIEW
OVERVIEW
The KS57C2302/C2304 single-chip CMOS microcontroller has been designed for high performance using
Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers).
With features such as, LCD direct drive capability, 8-bit timer/counter, and watch timer, the KS57C2302/C2304
offers an excellent design solution for a wide variety of applications that require LCD functions.
Up to 16 pins of the 64-pin QFP package, it can be dedicated to I/O. Four vectored interrupts provide fast
response to internal and external events. In addition, the KS57C2302/C2304 's advanced CMOS technology
provides for low power consumption and a wide operating voltage range.
OTP
The KS57C2302/C2304 microcontroller is also available in OTP (One Time Programmable) version, KS57P2304
www.DataSheet4U.com. The KS57P2304 microcontroller has an on-chip 4-Kbyte one-time-programmable EPROM instead of masked
ROM. The KS57P2304 is comparable to KS57C2302/C2304, both in function and in pin configuration.
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KS57C2304 pdf
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KS57C2302/C2304/P2304 MICROCONTROLLER
PRODUCT OVERVIEW
PIN DESCRIPTIONS
Pin Name
P1.0
P1.1
P1.2
P1.3
P2.0
P2.1
P2.2
P2.3
P3.0
P3.1
P3.2
P3.3
P6.0–P6.3
P8.0–P8.7
SEG0–SEG23
SEG24–SEG31
COM0–COM3
VLC0–VLC2
BIAS
LCDCK
Table 1-1. KS57C2302/C2304 Pin Descriptions
Pin
Type
Description
Number
Share
Pin
Reset Circuit
Value Type
I 4-bit input port.
17
INT0
Input A-4
1-bit or 4-bit read and test is possible. 18 INT1
4-bit pull-up resistors are software
19 INT2
assignable.
20 TCL0
I/O 4-bit I/O port.
1-bit and 4-bit read/write and test is
possible.
4-bit pull-up resistors are software
assignable.
21
TCLO0 Input
D
22 –
23 CLO
24 BUZ
I/O 4-bit I/O port.
1-bit and 4-bit read/write and test is
possible.
Each individual pin can be specified as
input or output. 4-bit pull-up resistors are
software assignable.
25
26
27
28
LCDCK
LCDSY
Input
D
I/O 4-bit I/O ports. Pins are individually
29–32 KS0–KS3
software configurable as input or output.
www.DataSheet4U.com1-bit and 4-bit read/write and test is
possible. 4-bit pull-up resistors are
software assignable.
Input
D
O Output port for 1-bit data (for use as
CMOS driver only)
40–33
SEG24– Output H-1
SEG31
O LCD segment signal output
64–41
– Output H
O LCD segment signal output
40–33 P8.0–P8.7 Output H-1
O LCD common signal output
1–4 – Output H
– LCD power supply.
Built-in voltage dividing resistors
6–8 – – –
– LCD power control
5 – ––
I/O LCD clock output for display expansion
25
P3.0
Input
D
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KS57C2304 arduino
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KS57C2302/C2304/P2304 MICROCONTROLLER
ADDRESS SPACES
+ PROGRAMMING TIP — Defining Vectored Interrupts
The following examples show you several ways you can define the vectored interrupt and instruction reference
areas in program memory:
1. When all vector interrupts are used:
ORG
0000H
VENT0
VENT1
VENT2
VENT3
1,0,RESET
0,0,INTB
0,0,INT0
0,0,INT1
; EMB 1, ERB 0; Jump to RESET address
; EMB 0, ERB 0; Jump to INTB address
; EMB 0, ERB 0; Jump to INT0 address
; EMB 0, ERB 0; Jump to INT1 address
ORG
000AH
VENT5
0,0,INTT0
; EMB 0, ERB 0; Jump to INTT0 address
2. When a specific vectored interrupt such as INT0, and INTT0 is not used, the unused vector interrupt locations
must be skipped with the assembly instruction ORG so that jumps will address the correct locations:
ORG
0000H
VENT0
VENT1
ORG
VENT3
1,0,RESET
; EMB 1, ERB 0; Jump to RESET address
0,0,INTB
; EMB 0, ERB 0; Jump to INTB address
www.DataSheet4U.com0006H
0,0,INT1
; INT0 interrupt not used
; EMB 0, ERB 0; Jump to INT1 address
ORG
0010H
3. If an INT0 interrupt is not used and if its corresponding vector interrupt area is not fully utilized, or if it is not
written by a ORG instruction as in Example 2, a CPU malfunction will occur:
ORG
0000H
VENT0
VENT1
VENT3
VENT5
1,0,RESET
0,0,INTB
0,0,INT1
0,0,INTT0
; EMB 1, ERB 0; Jump to RESET address
; EMB 0, ERB 0; Jump to INTB address
; EMB 0, ERB 0; Jump to INT0 address
; EMB 0, ERB 0; Jump to INT1 address
ORG
0010H
General-purpose ROM area
In this example, when an INT1 interrupt is generated, the corresponding vector area is not VENT3 INT1, but
VENT5 INTT0. This causes an INT1 interrupt to jump incorrectly to the INTT0 address and causes a CPU
malfunction to occur.
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