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PDF 39SF010 Data sheet ( Hoja de datos )

Número de pieza 39SF010
Descripción (sst39SF010 / SST39SF512) 512 Kbit / 1 Mbit (x8) Multi-Purpose Flash
Fabricantes Silicon Storage Technology 
Logotipo Silicon Storage Technology Logotipo



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No Preview Available ! 39SF010 Hoja de datos, Descripción, Manual

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512 Kbit / 1 Mbit (x8) Multi-Purpose Flash
SST39SF512 / SST39SF010
FEATURES:
SST39SF512 / 0105.0V 512Kb / 1Mb (x8) MPF memories
Data Sheet
• Organized as 64K x8 / 128K x8
• Single 5.0V Read and Write Operations
• Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
Low Power Consumption:
Active Current: 20 mA (typical)
Standby Current: 10 µA (typical)
Sector-Erase Capability
Uniform 4 KByte sectors
Fast Read Access Time:
70 ns
90 ns
Latched Address and Data
Fast Erase and Byte-Program:
Sector-Erase Time: 7 ms (typical)
Chip-Erase Time: 15 ms (typical)
Byte-Program Time: 20 µs (typical)
Chip Rewrite Time:
2 seconds (typical) for SST39SF512
3 seconds (typical) for SST39SF010
Automatic Write Timing
Internal VPP Generation
End-of-Write Detection
Toggle Bit
Data# Polling
TTL I/O Compatibility
JEDEC Standard
Flash EEPROM Pinouts and command sets
Packages Available
32-pin PLCC
32-pin TSOP (8mm x 14mm)
32-pin PDIP
PRODUCT DESCRIPTION
The SST39SF512/010 are CMOS Multi-Purpose Flash
(MPF) manufactured with SSTs proprietary, high perfor-
mance CMOS SuperFlash technology. The split-gate cell
design and thick oxide tunneling injector attain better reli-
ability and manufacturability compared with alternate
approaches. The SST39SF512/010 devices write (Pro-
gram or Erase) with a 5.0V-only power supply. The
SST39SF512/010 device conforms to JEDEC standard
pinouts for x8 memories.
Featuring high performance Byte-Program, the
SST39SF512/010 devices provide a maximum Byte-Pro-
gram time of 30 µsec. These devices use Toggle Bit or
Data# Polling to indicate the completion of Program opera-
tion. To protect against inadvertent write, they have on-chip
hardware and Software Data Protection schemes.
Designed, manufactured, and tested for a wide spectrum of
applications, these devices are offered with a guaranteed
endurance of 10,000 cycles. Data retention is rated at
greater than 100 years.
The SST39SF512/010 devices are suited for applications
that require convenient and economical updating of pro-
gram, configuration, or data memory. For all system appli-
cations, they significantly improve performance and
rweliawbwility.,DwahtilaeSlohweereintg4pUo.wceor mconsumption. They inher-
ently use less energy during erase and program than alter-
native flash technologies. The total energy consumed is a
function of the applied voltage, current, and time of applica-
tion. Since for any given voltage range, the SuperFlash
technology uses less current to program and has a shorter
erase time, the total energy consumed during any Erase or
Program operation is less than alternative flash technolo-
gies. These devices also improve flexibility while lowering
the cost for program, data, and configuration storage appli-
cations.
The SuperFlash technology provides fixed Erase and Pro-
gram times, independent of the number of Erase/Program
cycles that have occurred. Therefore the system software
or hardware does not have to be modified or de-rated as is
necessary with alternative flash technologies, whose Erase
and Program times increase with accumulated Erase/Pro-
gram cycles.
To meet high density, surface mount requirements, the
SST39SF512/010 are offered in 32-pin PLCC packages,
32-pin TSOP, and a 600 mil, 32-pin PDIP is also available.
See Figures 1, 2, and 3 for pinouts.
Device Operation
Commands are used to initiate the memory operation func-
tions of the device. Commands are written to the device
using standard microprocessor write sequences. A com-
mand is written by asserting WE# low while keeping CE#
©2001 Silicon Storage Technology, Inc.
S71149-03-000 4/01
394
1
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
MPF is a trademark of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.

1 page




39SF010 pdf
www.DataSheet4U.com
512 Kbit / 1 Mbit Multi-Purpose Flash
SST39SF512 / SST39SF010
Data Sheet
SST39SF010 SST39SF512
A11
A9
A8
A13
A14
NC
WE#
VDD
NC
A16
A15
A12
A7
A6
A5
A4
A11
A9
A8
A13
A14
NC
WE#
VDD
NC
NC
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Standard Pinout
Top View
Die Up
FIGURE 2: PIN ASSIGNMENTS FOR 32-PIN TSOP (8MM X 14MM)
SST39SF512 SST39SF010
32
OE#
OE#
31 A10 A10
30 CE# CE#
29
DQ7
DQ7
28
DQ6
DQ6
27
DQ5
DQ5
26
DQ4
DQ4
25
DQ3
DQ3
24
VSS
VSS
23
DQ2
DQ2
22
DQ1
DQ1
21
DQ0
DQ0
20 A0 A0
19 A1 A1
18 A2 A2
17 A3 A3
394 ILL F01.2
SST39SF010 SST39SF512
SST39SF512 SST39SF010
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
NC
NC
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
6 32-pin
7 PDIP
8 Top View
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VDD
WE#
NC
A14
A13
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VDD
WE#
NC
A14
A13
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
394 ILL F02a.3
FIGURE 3: PIN ASSIGNMENTS FOR 32-PIN PDIP
www.DataSheet4U.com
©2001 Silicon Storage Technology, Inc.
5
S71149-03-000 4/01 394

5 Page





39SF010 arduino
www.DataSheet4U.com
512 Kbit / 1 Mbit Multi-Purpose Flash
SST39SF512 / SST39SF010
Data Sheet
ADDRESS AMS-0
CE#
TAS
OE#
5555
TAH
TCP
2AAA
TCPH
5555
ADDR
INTERNAL PROGRAM OPERATION STARTS
TBP
TDH
TDS
WE#
TCH
DQ7-0
TCS
AA 55 A0 DATA
SW0
SW1
SW2
BYTE
(ADDR/DATA)
Note: AMS = Most significant address
AMS = A15 for SST39SF512 and A16 for SST39SF010
394 ILL F05.1
FIGURE 6: CE# CONTROLLED PROGRAM CYCLE TIMING DIAGRAM
ADDRESS AMS-0
CE#
OE#
WE#
TOEH
TCE
TOE
DQ7
D D#
Note: AMS = Most significant address
AMS = A15 for SST39SF512 and A16 for SST39SF010
www.DataSheet4U.com
FIGURE 7: DATA# POLLING TIMING DIAGRAM
D#
©2001 Silicon Storage Technology, Inc.
11
TOES
D
394 ILL F06.1
S71149-03-000 4/01 394

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