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PDF IMIFS786 Data sheet ( Hoja de datos )

Número de pieza IMIFS786
Descripción (IMIFS786 / IMIFS787) Low EMI Spectrum Spread Clock
Fabricantes Cypress Semiconductor 
Logotipo Cypress Semiconductor Logotipo



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No Preview Available ! IMIFS786 Hoja de datos, Descripción, Manual

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APPROVED PRODUCT
FS786/787
Features
Spread Spectrum Clock Generator (SSCG)
with 1x Spread and 1X non-Spread Output.
6 to 82 MHz operating frequency range.
Modulates external clocks including crystals,
crystal oscillators and ceramic resonators.
Programmable modulation with simple
R-C external loop filter (LF)
Provides Two Output Clocks, One Modulated
and One Non-Modulated clock.
Center Spread Modulation.
3 - 5 Volt power supply.
TTL/CMOS compatible outputs.
Low short term jitter.
Low Power Dissipation;
3.3 VDC = 37 mW – typical
5.0 VDC = 115 mW - typical
Available in 8 pin SOIC package.
Product Description
The CYPRESS FS786/787 are Spread Spectrum
Clock Generator ICs (SSCG) designed for the
purpose of reducing Electro Magnetic Interference
(EMI) found in today’s high-speed digital systems.
The FS786/787 SSCG clocks use an Cypress
proprietary technology to modulate the input clock
frequency, FSOUT by modulating the frequency of
the digital clock. By modulating the reference clock
the measured EMI at the fundamental and harmonic
frequencies of FSOUT is greatly reduced. This
reduction in radiated energy can significantly reduce
the cost of complying with regulatory requirements
without degrading digital waveforms.
The CYPRESS FS786/787 clocks are very simple
and versatile devices to use. Range selection is
performed via one pin, D0. The FS786/787 are
designed to operate over a very wide range of input
frequencies and provide one modulated and one
non-modulated output.
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Low EMI Spread Spectrum Clock
Applications
Desktop/Notebook Computers
Printers, Copiers and MFP
Scanners and Fax
LCD Displays and Monitors
CD-ROM, VCD and DVD
Automotive and Embedded Systems
Networking, LAN/WAN
Digital Cameras and Camcorders
Modems
Benefits
Programmable EMI Reduction
Fast Time to Market
Lower cost of compliance
No degradation in Rise/Fall times
Lower component and PCB layer count
The FS786/787 devices have a simple frequency
selection table that allows operation from 6 MHz to
82 MHz in two separate ranges and two separate
parts. The bandwidth of the frequency spread at
FSOUT is determined by the values of the loop filter
components. The modulation rate is determined
internally by the input frequency and the selected
input frequency range.
The Bandwidth of these products can be
programmed from as little as 0.6% up to as much as
4.0% by selecting the proper loop filter value. Refer
to the Loop Filter Selection chart on page 6 for
recommended values. Due to a wide range of
application requirements, an external loop filter (LF)
is used on the FS786/787 products. The user can
select the exact amount of frequency modulation
suitable for the application. Using a fixed internal
loop filter would severely limit the use of a wide
range of modulation bandwidths (Spread %) to a few
discrete values.
Refer to FS791/2/4 products for applications
requiring 80 to 140 MHz frequency range.
Cypress Semiconductor Corporation
http://www.cypress
Document#: 38-07031 Rev. *A
12/14/02
Page 1 of 13

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IMIFS786 pdf
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APPROVED PRODUCT
FS786/787
Low EMI Spread Spectrum Clock
Timing Characteristics
Characteristic
Symbol
Min.
Typ.
Max.
Units
FSOUT Rise Time
@ 10 - 90% at 5 VDC
tTLH
2.0
2.2
2.5
ns
FSOUT Fall Time
@ 10 - 90% at 5 VDC
tTHL
1.7
2.0
2.2
ns
FSOUT Rise Time
@ 0.8 - 2.0V at 5 VDC
tTLH
0.50
0.65
0.75
ns
FSOUT Fall Time
@ 0.8 - 2.0V at 5 VDC
tTHL
0.50
0.65
0.75
ns
FSOUT Rise Time
@ 10 - 90% at 3.3 VDC
tTLH
2.6
2.65
2.9
ns
FSOUT Fall Time
@ 10 - 90% at 3.3 VDC
tTHL
2.0
2.1
2.2
ns
FSOUT Rise Time
@ 0.8 - 2.0V at 3.3 VDC
tTLH
0.8
0.95
1.1
ns
FSOUT Fall Time
@ 0.8 - 2.0V at 3.3 VDC
tTHL
0.78
0.85
0.9
ns
FSOUT Duty Cycle
@ 50% of VDD TsymF1
45
50
55
%
FSOUT, Cycle to Cycle Jitter, 48 MHz @ 3.30 VDC CCJ - 320 370 ps
FSOUT, Cycle to Cycle Jitter, 48 MHz @ 5.00 VDC CCJ - 310 360 ps
FSOUT, Cycle to Cycle Jitter, 72 MHz @ 3.30 VDC CCJ - 270 325 ps
FSOUT, Cycle to Cycle Jitter, 72 MHz @ 5.00 VDC CCJ - 390 440 ps
REFOUT Rise Time
@ 10 90% at 5 VDC
tTLH
4.2
4.5
4.9
ns
REFOUT Fall Time
@ 10 90% at 5 VDC
tTHL
2.5
2.65
2.8
ns
REFOUT Rise Time
@ 0.8 2.0 V at 5 VDC
tTLH
0.74
0.80
0.86
ns
REFOUT Fall Time
@ 0.8 2.0 V at 5 VDC
tTHL
0.76
0.85
0.93
ns
REFOUT Rise Time
@ 10 90% at 3.3 VDC
tTLH
4.6
4.95
5.3
ns
REFOUT Fall Time
@ 10 90% at 3.3 VDC
tTHL
2.5
2.65
2.8
ns
REFOUT Rise Time
@ 0.8 2.0 V at 3.3 VDC
tTLH
1.4
1.5
1.6
ns
REFOUT Fall Time
@ 0.8 2.0 V at 3.3 VDC
tTHL
1.00
1.1
1.2
ns
Unless otherwise indicated, measurements performed at VDD = 3.3 and 5.0V ± 10%, Ta = 0°C to 70°C, CL = 15pF, Xin
= 48 MHz.
Table 5
Application Selection Table
Select the row containing the frequency for the intended application. Read the device number and D0
programming in cells to the right of Fin. The Modulation Rate is also given below.
Fin (MHz)
(pin 1/2)
6 – 14
16 – 32
34 - 62
64 - 82
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D0
(pin 3)
0
0
1
1
Modulation
Rate
Fin/120
Fin/240
Fin/480
Fin/720
Table 6
Device to Use
FS787BZB
FS786BZB
FS787BZB
FS786BZB
Cypress Semiconductor Corporation
http://www.cypress
Document#: 38-07031 Rev. *A
12/14/02
Page 5 of 13

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IMIFS786 arduino
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APPROVED PRODUCT
FS786/787
Low EMI Spread Spectrum Clock
Application Notes and Schematic
The schematic at the right is configured for the following parameters;
Package selected = FS786
Crystal is a 20 MHz, Fundamental,
with 18 pF load capacitance.
If Crystal load capacitance is different
than 18 pF, C1 and C2 must be
re-calculated.
For third overtone crystals, a parallel or
series resonant trap is required.
Mount loop filter components as
close to LF pin as possible.
Bandwidth is determined by the
value of the Loop Filter components
connected to pin 4.
.
C4
27 pF
C5
27 pF
20 M Hz
Y1
1 Xin
2 Xout
VDD
3
D0
VDD 8
C2
FSOUT 7
FS786
6
REFOUT
0.1 uF
4
LF
R6
C7 C8
**
** Occasionally, C8 is used to
create a second pole for this loop
filter. Refer to Loop Filter Selection
table.
5
VSS
VDD
FSOUT
REFOUT
By selecting the FS786 or the FS787 and selecting D0 low or high, any input frequency from 6 to 82 MHz can be
modulated. In addition to providing a modulated Low EMI clock, the FS786 and FS787 also provide a non-
modulated clock which is a buffered copy of the reference oscillator.
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Package Drawing and Dimensions
Cypress Semiconductor Corporation
http://www.cypress
Document#: 38-07031 Rev. *A
12/14/02
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