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PDF KM688100 Data sheet ( Hoja de datos )
| Número de pieza | KM688100 | |
| Descripción | 1M x 8-Bit Low Power and Low Voltage CMOS Static RAM | |
| Fabricantes | Samsung Semiconductor | |
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( DataSheet : www.DataSheet4U.com )
KM688100 Family
Document Title
1Mx8 bit Low Power and Low Voltage CMOS Static RAM
Revision History
Revision No. History
0.0 Initial draft
- Dual CS
Preliminary
CMOS SRAM
Draft Date
June 22, 1999
Remark
Advance
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to yourquestions about device. If you have any questions, please contact the SAMSUNG branch offices.
1 Revision 0.0
June 1999
www.DataSheet4U.com
1 page  
KM688100 Family
Preliminary
CMOS SRAM
AC OPERATING CONDITIONS
TEST CONDITIONS(Test Load and Input/Output Reference)
Input pulse level: 0.4 to 2.2V
Input rising and falling time: 5ns
Input and output reference voltage:1.5V
Output load(see right): CL=100pF+1TTL
CL=50pF+1TTL
CL1)
1.Including scope and jig capacitance
AC CHARACTERISTICS (VCC=4.5~5.5V, Commercial product: TA=0 to 70°C, Industrial product: TA=-40 to 85°C)
Parameter List
Read
Write
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Output enable to low-Z output
Output hold from address change
Chip disable to high-Z output
OE disable to high-Z output
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
Symbol
tRC
tAA
tCO1, tCO2
tOE
tLZ1, tLZ1
tOLZ
tOH
tHZ1, tHZ1
tOHZ
tWC
tCW1, tCW2
tAS
tAW
tWP
tWR
tWHZ
tDW
tDH
tOW
Speed Bins
55ns
70ns
Min Max Min Max
55 - 70 -
- 55 - 70
- 55 - 70
- 25 - 35
10 - 10 -
5-5-
5 - 10 -
0 20 0 25
0 20 0 25
10 - 70 -
- 25 60 -
0 20 0
-
55 - 60 -
45 - 55 -
0-0-
45 -
0 25
45 - 30 -
0-0-
0 20 5
-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Symbol
Test Condition
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
VDR
IDR
tSDR
tRDR
CS1≥Vcc-0.2V1)
Vcc=3.0V, CS1≥Vcc-0.2V1)
See data retention waveform
1. CS1≥Vcc-0.2V,CS2≥Vcc-0.2V(CS1 controlled) or CS2≥Vcc-0.2V(CS2 controlled).
2. Industrial product=30µA
Min Typ Max Unit
2.0 - 5.5 V
- - 202) µA
0- -
ms
5- -
5 Revision 0.0
June 1999
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet KM688100.PDF ] | |
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