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PDF SD680CT Data sheet ( Hoja de datos )

Número de pieza SD680CT
Descripción (SD620CT - SD6100CT) SCHOTTKY BARRIER RECTIFIER
Fabricantes Pan Jit International 
Logotipo Pan Jit International Logotipo



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No Preview Available ! SD680CT Hoja de datos, Descripción, Manual

DATA SHEET
SD620CT~SD6100CT
SCHOTTKY BARRIER RECTIFIERS
VOLTAGE 20 to 100 Volts CURRENT 6.0 Amperes TO-251AB
FEATURES
• Plastic package has Underwriters Laboratory Flammability Classification 94V-O
• For surface mounted applications
• Low profile package
• Built-in strain relief
• Low power loss, High efficiency
• High surge capacity
• For use in low voltage high frequency inverters, free wheeling, and
polarity protection applications
• High temperature soldering guaranteed:260OC/10 seconds at terminals
• Pb free product are available : 99% Sn above can meet Rohs environment substance
directive request
.264(6.7)
.248(6.3)
.216(5.5)
.200(5.1)
MECHANICALDATA
Case: D PAK/TO-251AB molded plastic
Terminals: Solder plated, solderable per MIL-STD-202G,Method 208
Polarity: As marking
Weight: 0.015 ounces, 0.4grams.
.032(0.8)
.012(0.3)
.09 .09
(2.3) (2.3)
Unit : inch (mm)
.098(2.5)
.082(2.1)
.024(0.6)
.016(0.4)
.071(1.8)
.051(1.3)
.02(0.5)
MAXIMUM RATINGS AND ELECTRICAL CHARACTERISTICS
Ratings at 25°C ambient temperature unless otherwise specified. Single phase, half wave, 60 Hz, resistive or inductive load.
For capacitive load, derate current by 20%
PARAM ETER
S Y M B O L S D 620C T S D 630C T S D 640C T S D 650C T S D 660C T S D 680C T S D 6100C T U N IT S
M axim um R ecurrent P eak R everse V oltage
VRRM
20
30
40
50
60
80
100 V
M axim um R M S V oltage
V RM S
14
21 28 35 42 56
70 V
M axim um D C B locking V oltage
V DC 20 30 40
M axim um A verage F orw ard C urrent .375"(9.5m m )
lead length at Tc =75O C
P eak F orw ard S urge C urrent :8.3m s single half sine-w ave
superim posed on rated load(JE D E C m ethod)
IA V
IF S M
M axim um F orw ard V oltage at 3.0A per leg
V F 0.55
M axim um D C R everse C urrent TJ=25O C
at R ated D C B locking V oltage TJ=100O C
IR
Typical Therm al R esistance
R θJC
50 60
6.0
75
0.70
0.2
20
5
80 100
0.85
V
A
A
V
mA
OC /W
O perating Junction Tem perature R ang
TJ
-50 to +125
OC
S torage Tem perature R ang
TJ,TS TG
-50 to +150
OC
Note: Both Bonding and Chip structure are available.
www.DataSheet4U.com
www.DataSheet4U.com
STAD-DEC.16.2004
PAGE . 1

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