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PDF ST93C46A Data sheet ( Hoja de datos )

Número de pieza ST93C46A
Descripción (ST93C4xx) 1K 64 x 16 or 128 x 8 SERIAL MICROWIRE EEPROM
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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No Preview Available ! ST93C46A Hoja de datos, Descripción, Manual

ST93C46A,46C,46T
ST93C47C,47T
1K (64 x 16 or 128 x 8) SERIAL MICROWIRE EEPROM
NOT FOR NEW DESIGN
1 MILLION ERASE/WRITE CYCLES, with
40 YEARS DATA RETENTION
DUAL ORGANIZATION: 64 x 16 or 128 x 8
BYTE/WORD and ENTIRE MEMORY
PROGRAMMING INSTRUCTIONS
SELF-TIMED PROGRAMMING CYCLE with
mAUTO-ERASE
oREADY/BUSY SIGNAL DURING
PROGRAMMING
.cSINGLE SUPPLY VOLTAGE:
– 4.5V to 5.5V for ST93C46 version
– 3V to 5.5V for ST93C47 version
USEQUENTIAL READ OPERATION
t45ms TYPICAL PROGRAMMING TIME
ENHANCED ESD/LATCH UP
ePERFORMANCE for ”C” VERSION
ST93C46A, ST93C46C, ST93C46T,
eST93C47C, ST93C47T are replaced by the
M93C46
8
1
PSDIP8 (B)
0.4mm Frame
8
1
SO8 (M)
150mil Width
Figure 1. Logic Diagram
hDESCRIPTION
SThis specification covers a range of 1K bit serial
taEEPROM products, the ST93C46A,46C,46T
specified at 5V±10% and the ST93C47C,47T
specified at 3V to 5.5V.
aIn the text, products are referred to as ST93C46.
The ST93C46 is a 1K bit Electrically Erasable
.DProgrammableMemory (EEPROM) fabricated with
SGS-THOMSON’s High EnduranceSingle Polysili-
con CMOS technology. The memory is accessed
wthrough a serial input (D) and output (Q).
wTable 1. Signal Names
wS Chip Select Input
D
C
S
ORG
VCC
ST93C46
ST93C47
Q
D
Q
C
ORG
VCC
VSS
Serial Data Input
Serial Data Output
Serial Clock
Organisation Select
Supply Voltage
Ground
June 1997
This is information on a product still in production bu t not recommended for new de signs.
wwVSwS .DataSheAIe008t714C 1U/13.com

1 page




ST93C46A pdf
Figure 5. Synchronous Timing, Read or Write
ST93C46A/46C/46T, ST93C47C/47T
C
S
tDVCH
tCHDX
D An
A0
Hi-Z
Q
tCHQL
tCHQV
Q15/Q7
tCLSL
tSLSH
tSLQZ
Q0
ADDRESS INPUT
C
S
tDVCH
D An
Hi-Z
Q
tCHDX
A0/D0
ADDRESS/DATA INPUT
DATA OUTPUT
AI00820C
tSLCH
tCLSL
tSLSH
tSHQV tSLQZ
BUSY
READY
tW
WRITE CYCLE
AI01429
DESCRIPTION (cont’d)
counter automatically rolls over to ’00’ when the
highest address is reached.
Programming is internally self-timed (the external
clock signal on C input may be disconnected or left
running after the start of a Write cycle) and does
not require an erase cycle prior to the Write instruc-
tion. The Write instruction writes 8 or 16 bits at one
time into one of the 128 bytes or 64 words. After
the start of the programming cycle a Busy/Ready
signal is available on the Data output (Q) when
Chip Select (S) is High.
An internal feature of the ST93C46 provides
Power-on Data Protection by inhibiting any opera-
tion when the Supply is too low. The design of the
ST93C46 and the High Endurance CMOS technol-
ogy used for its fabrication give an Erase/Write
cycle Endurance of 1,000,000 cycles and a data
retention of 40 years.
The DU (Don’t Use) pin does not affect the function
of the memory and it is reserved for use by SGS-
THOMSON during test sequences.The pin may be
left unconnected or may be connected to VCC or
VSS. Direct connection of DU to VSS is recom-
mended for the lowest standby power consump-
tion.
5/13

5 Page





ST93C46A arduino
ST93C46A/46C/46T, ST93C47C/47T
Symb
A
A1
A2
B
B1
C
D
E
E1
e1
eA
eB
L
N
CP
PSDIP8
PSDIP8 - 8 pin Plastic Skinny DIP, 0.4mm lead frame
Typ
7.62
2.54
mm
Min
0.70
3.10
0.38
1.15
0.38
9.20
6.30
8.40
3.00
8
inches
Max Typ Min
4.80
– 0.028
3.60 0.122
0.58 0.015
1.65 0.045
0.52 0.015
9.90 0.362
– 0.300 –
7.10 0.248
– 0.100 –
– 0.331
9.20
3.80 0.118
8
0.10
Max
0.189
0.142
0.023
0.065
0.020
0.390
0.280
0.362
0.150
0.004
A2 A
A1 L
B e1
B1
D
N
E1 E
1
Drawing is not to scale
C
eA
eB
PSDIP-a
11/13

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