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PDF s1d13504 Data sheet ( Hoja de datos )

Número de pieza s1d13504
Descripción LCD_Module
Fabricantes EPSON 
Logotipo EPSON Logotipo



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.com MSC Vertriebs-GmbH
U Productmarketing Displays & Systems
t4 Friedrich-Bergius-Str. 9, D - 65203 Wiesbaden
e Tel:+49-611-97320-0, Fax:+49-61197320-88
e http://www.msc-ge.com
.DataShS1D13504 Color Graphics LCD/CRT Controller
wwHwardware Functional Specifti4caUtio.cnomDocument Number: X19A-A-002-19
www.DataShee U.comCopyright © 1997, 2001 Epson Research and Development, Inc. All Rights Reserved.
t4Information in this document is subject to change without notice. You may download and use this document, but only for your own use in
eevaluating Seiko Epson/EPSON products. You may not modify the document. Epson Research and Development, Inc. disclaims any
herepresentation that the contents of this document are accurate or current. The Programs/Technologies described in this document may contain
material protected under U.S. and/or International Patent laws.
www.DataSEPSON is a registered trademark of Seiko Epson Corporation. All other trademarks are the property of their respective owners.

1 page




s1d13504 pdf
Epson Research and Development
Vancouver Design Center
Page 5
8.2.9 External RAMDAC Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
9 Display Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113
9.1 Image Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .114
9.2 Half Frame Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .114
10 Display Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115
10.1 Display Mode Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115
10.2 Image Manipulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .117
11 Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .118
11.1 Maximum MCLK: PCLK Ratios . . . . . . . . . . . . . . . . . . . . . . . . . . .118
11.2 Frame Rate Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .119
12 Look-Up Table Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .121
12.1 Gray Shade Display Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . .121
12.2 Color Display Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .123
13 Power Save Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127
13.1 Hardware Suspend . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127
13.2 Software Suspend . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127
13.3 Power Save Mode Function Summary . . . . . . . . . . . . . . . . . . . . . . . . .128
13.4 Pin States in Power Save Modes . . . . . . . . . . . . . . . . . . . . . . . . . . .128
14 Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .129
14.1 QFP15-128 (S1D13504F00A) . . . . . . . . . . . . . . . . . . . . . . . . . . . .129
14.2 TQFP15-128 (S1D13504F01A) . . . . . . . . . . . . . . . . . . . . . . . . . . .130
14.3 QFP20-144 (S1D13504F02A) . . . . . . . . . . . . . . . . . . . . . . . . . . . .131
15 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132
16 Sales and Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .133
Hardware Functional Specification
Issue Date: 01/11/06
S1D13504
X19A-A-002-19

5 Page





s1d13504 arduino
Epson Research and Development
Vancouver Design Center
Page 11
1 Introduction
1.1 Scope
This is the Hardware Functional Specification for the S1D13504 Series Color Graphics LCD/CRT
Controller Chip. Included in this document are timing diagrams, AC and DC characteristics, register
descriptions, and power management descriptions. This document is intended for two audiences:
Video Subsystem Designers and Software Developers.
This document is updated as appropriate. Please check for the latest revision of this document before
beginning any development. The latest revision can be downloaded at www.erd.epson.com.
We appreciate your comments on our documentation. Please contact us via email at documen-
1.2 Overview Description
The S1D13504 is a low cost, low power color/monochrome LCD/CRT controller interfacing to a
wide range of CPUs and LCDs. The S1D13504 architecture is designed to meet the requirements of
embedded markets such as Office Automation equipment, Mobile Communications devices and
Hand-Held PCs where Windows CE may serve as a primary operating system.
The S1D13504 supports LCD interfaces with data widths up to 16 bits. Using Frame Rate
Modulation (FRM), it can display 16 shades of gray on monochrome LCD panels, up to 4096 colors
on passive color LCDs, and 64K colors on active matrix TFT LCD panels. CRT support is handled
through the use of an external RAMDAC interface allowing simultaneous display of both the CRT
and LCD panel. A 16-bit memory interface supports up to 2M bytes of FPM-DRAM or EDO-
DRAM. Flexible operating voltages from 2.7V to 5.5V provide for very low power consumption.
Hardware Functional Specification
Issue Date: 01/11/06
S1D13504
X19A-A-002-19

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