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PDF NL37WZ14 Data sheet ( Hoja de datos )

Número de pieza NL37WZ14
Descripción Triple Schmitt-Trigger Inverter
Fabricantes ON Semiconductor 
Logotipo ON Semiconductor Logotipo



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No Preview Available ! NL37WZ14 Hoja de datos, Descripción, Manual

NTInrLvip3el7retWeSSZrch1eh4emt4iUtt.coTmriggerThe NL37WZ14 is a high performance triple inverter with
taSchmittTrigger inputs operating from a 1.65 to 5.5 V supply.
Pin configuration and function are the same as the NL37WZ04, but
athe inputs have hysteresis, and with its Schmitt trigger function, the
.DNL37WZ14 can be used as a line receiver which will receive slow
winput signals. The NL37WZ14 is capable of transforming slowly
wchanging input signals into sharply defined, jitterfree output signals.
w In addition, it has a greater noise margin than conventional inverters.
The NL37WZ14 has hysteresis between the positivegoing and the
mnegativegoing input thresholds (typically 1.0 V) which is determined
ointernally by transistor ratios and is essentially insensitive to
temperature and supply voltage variations.
.cFeatures
Designed for 1.65 V to 5.5 V VCC Operation
UOver Voltage Tolerant Inputs and Outputs
t4LVTTL Compatible Interface Capability with 5 V TTL Logic
with VCC = 3 V
eLVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
eNear Zero Static Supply Current Substantially Reduces System
hPower Requirements
Current Drive Capability is 24 mA at the Outputs
SChip Complexity: FET = 94
taPbFree Package is Available
aIN A1 1
.DOUT Y3 2
8 VCC
7 OUT Y1
wwIN A2 3
6 IN A3
w .comGND 4
5 OUT Y2
t4UFigure 1. Pinout (Top View)
heeIN A1
1
OUT Y1
taSIN A2
1
OUT Y2
aIN A3
1
OUT Y3
.DFigure 2. Logic Symbol
ww© Semiconductor Components Industries, LLC, 2005
wSeptember, 2005 Rev. 5
1
http://onsemi.com
MARKING
DIAGRAM
8
8
1
US8
US SUFFIX
CASE 493
LA M G
G
1
LA = Device Code
M = Date Code*
G = PbFree Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
PIN ASSIGNMENT
1 IN A1
2 OUT Y3
3 IN A2
4 GND
5 OUT Y2
6 IN A3
7 OUT Y1
8 VCC
FUNCTION TABLE
A Input
Y Output
LH
HL
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Publication Order Number:
NL37WZ14/D

1 page




NL37WZ14 pdf
NL37WZ14
PACKAGE DIMENSIONS
US8
US SUFFIX
CASE 49302
ISSUE A
X
A
8 5 Y
BL
J
DETAIL E
14
PG
R
S
U
T
SEATING
PLANE
C
DK
0.10 (0.004) M T X Y
0.10 (0.004) T
V
H
N
DETAIL E
F
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION “A” DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURR.
MOLD FLASH. PROTRUSION AND GATE
BURR SHALL NOT EXCEED 0.140 MM
(0.0055”) PER SIDE.
4. DIMENSION “B” DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH AND PROTRUSION
SHALL NOT E3XCEED 0.140 (0.0055”) PER
SIDE.
5. LEAD FINISH IS SOLDER PLATING WITH
THICKNESS OF 0.00760.0203 MM.
(300800 “).
6. ALL TOLERANCE UNLESS OTHERWISE
SPECIFIED ±0.0508 (0.0002 “).
R 0.10 TYP
M
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 1.90 2.10 0.075 0.083
B 2.20 2.40 0.087 0.094
C 0.60 0.90 0.024 0.035
D 0.17 0.25 0.007 0.010
F 0.20 0.35 0.008 0.014
G 0.50 BSC
0.020 BSC
H 0.40 REF
0.016 REF
J 0.10 0.18 0.004 0.007
K 0.00 0.10 0.000 0.004
L 3.00 3.20 0.118 0.126
M 0_ 6_ 0_ 6_
N 5 _ 10 _ 5 _ 10 _
P 0.23 0.34 0.010 0.013
R 0.23 0.33 0.009 0.013
S 0.37 0.47 0.015 0.019
U 0.60 0.80 0.024 0.031
V 0.12 BSC
0.005 BSC
0.50
0.0197
SOLDERING FOOTPRINT*
0.38
0.015
1.8
0.07
0.30
0.012
1.0
0.0394
ǒ ǓSCALE 8:1
mm
inches
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
5

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