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PDF EDGE728 Data sheet ( Hoja de datos )

Número de pieza EDGE728
Descripción Very High Speed Dual and Quad Channel ECL Delay Lines
Fabricantes Semtech Corporation 
Logotipo Semtech Corporation Logotipo



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No Preview Available ! EDGE728 Hoja de datos, Descripción, Manual

Edge728
U.com QuaVde-CrhyaHninghel-SEpCeLedDeDlauyalL- iannedsHIGH-PERFORMANCE PRODUCTS – ATE
t4Description
Features
SheeThe Edge728 is a quad delay and deskew element.
taManufactured in a high performance bipolar process, it is
adesigned primarily for channel deskew applications in
.DMemory Test Equipment.
wwThe part offers a full scale delay range of 8.0 ns with
windependent ± 750 ps adjustment of the falling edge.
mThe Edge728 has a drive mode, where one input signal
ois routed to all of the outputs. This mode is particularly
useful in a fanout application.
• Pin and Functionally Compatible with the Edge 628
and Edge624 in Modes 0 and 2
• Independent Delay Adjustments for Positive and
Negative Transitions
• Fanout Mode for One Input Distributed to All
Channels
• 44-pin MQFP Package with Internal Heat Spreader,
44-pin PLCC with Internal Heat Spreader, or
Die Form
.cThe delay value (and resolution) is controlled via an external Functional Block Diagram
Uvoltage DAC.
t4This deskew element is designed specifically to be
monotonic and stable while delaying a very narrow pulse
eover a wide delay range.
DRVMODE
S1
eThe Edge728 is a pin and functionally compatible upgrade
hto the Edge628 with the following differences:
• greater net usable delay range
S• greater net usable falling edge
taadjustment range
• only one external bias resistor required
• only one external compensation capacitor required
.DaApplications
IN1
IN1*
IN2
IN2*
OUT1
OUT1*
VDELAY1
VWIDTH1
OUT2
OUT2*
VDELAY2
VWIDTH2
ww• Automatic Test Equipment
w .com• Memory Tester Drive On Channel Deskew
IN3 OUT3
IN3*
OUT3*
VDELAY3
VWIDTH3
t4UIN4 OUT4
eeIN4*
OUT4*
ShVDELAY4
www.Data VWIDTH4
Revision 3 / February 18, 2002
1
www .semtech.com

1 page




EDGE728 pdf
Edge728
HIGH-PERFORMANCE PRODUCTS – ATE
Circuit Description (continued)
IN1, IN1*
T
VDELAY1
OUT1, OUT1*
Mode 2
Mode 2 allows independent adjustment of the rising and
falling edges (see Figures 4 and 5). The propagation delay
for a rising edge is defined as
IN2, IN2*
T
VDELAY2
OUT2, OUT2*
Tpd+ = Tpd(min) + Tspan
where Tpd(min) is the raw propagation delay of the part
with minimum programmed delay, and Tspan is the
additional delay programmed via the VDELAY input.
VDELAY3
The propagation delay for a falling edge is defined as
IN3, IN3*
T
OUT3, OUT3*
Tpd– = Tpd(min) + Tspan + Twidth
IN4, IN4*
T
VDELAY4
OUT4, OUT4*
Figure 3. Mode 0 Functional Diagram
where Twidth is defined as the additional delay incurred
by adjusting the VWIDTH input. Notice that Twidth can be
either positive or negative, allowing the part to either
expand or contract an input signal (see Figure 4).
Notice also that Tpd+ is a function of VDELAY only, while
Tpd– is a function of VDELAY and VWIDTH. The transfer
function for Tspan vs. VDELAY is shown for both modes in
Figure 4. The transfer function for Twidth vs. VWIDTH and
VDELAY is shown in Figure 6.
Analog Delay Inputs
REXT2
VDELAY and VWIDTH are high input impedance analog
voltage inputs which control the delay of the rising and
falling edge. VWIDTH can vary from –0.1V to –1.1V, and
VDELAY can vary from –0.2V to –1.1V. When both inputs
are –1.1V, a maximum delay results.
REXT2 is an analog current input used to establish the
bias current of the delay cells. An external resistor of
2.74 Kshould be connected between REXT2 and ground.
The voltage on REXT2 is forced to ~ –1.34V, producing
an input current of (1.34V) / 2.74 K= 489 µA.
If mode 0 is used, connect all VWIDTH inputs to GND.
Also, connect any unused VDELAY and VWIDTH inputs to
GND.
COMP2
COMP2 is an op amp compensation pin and requires an
external capacitor of 0.01 µF (X7R type) connected to
either VEE or ground.
2000 Semtech Corp.
5 www .semtech.com

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EDGE728 arduino
Edge728
HIGH-PERFORMANCE PRODUCTS – ATE
Package Information (continued)
e
A, B, D3
DETAIL "A"
A2 – 0.10 S
A1
0.40 MIN.
˚0 MIN.
0.13
R. MIN.
0.13 / 0.30 R.
C
L
1.60 REF.
C
DETAIL "B"
˚0 – 7
GAGE PLANE
0.25
˚12 – 16
1.41 REF.
˚12 – 16
SEE DETAIL "B"
A
H2
0.076
C
12 0.13 / 0.23
SECTION C-C
8
b
ccc M C A – B S D S
WITH LEAD FINISH
0.13 / 0.17
b1
BASE METAL
Notes:
1. All dimensions and tolerances conform to
ANSI Y14.5-1982.
2. Datum plane -H- located at mold parting line and
coincident with lead, where lead exits plastic body
at bottom of parting line.
3. Datums A-B and -D- to be determined where
centerline between leads exits plastic body at datum
plane -H-.
4. To be determined at seating plane -C-.
5. Dimensions D1 and E1 do not include mold
protrusion. Allowable mold protrusion is 0.254 mm
per side. Dimensions D1 and E1 do include mold
mismatch and are determined at datum plane -H-.
6. Nis the total # of terminals.
7. Package top dimensions are smaller than bottom
dimensions by 0.20 mm, and top of package will
not overhang bottom of package.
8. Dimension b does not include dambar protrusion.
Allowable dambar protrusion shall be 0.08 mm total
in excess of the b dimension at maximum material
condition. Dambar cannot be located on the lower
radius or the foot.
9. All dimensions are in millimeters.
10. Maximum allowable die thickness to be assembled
in this package family is 0.635 millimeters.
11. This drawing conforms to JEDEC registered outline
MS-108.
12. These dimensions apply to the flat section of the
lead between 0.10 mm and 0.25 mm from the lead tip.
2000 Semtech Corp.
Symbol Min Nom Max Note Comments
A
2.15 2.35
Height above PCB
A1 0.10 0.15 0.25
PCB Clearance
A2 1.95 2.00 2.10
Body Thickness
D
13.20 BSC
4
D1 10.00 BSC 5 Body Length
D2 8.00 REF
ZD 1.00 REF
E
13.20 BSC
4
E1 10.00 BSC 5 Body Width
E2 8.00 REF
ZE 1.00 REF
L 0.73 0.88 1.03
N 44 6 Pin Count
e 0.80
Lead Pitch
b 0.30
0.45 8
b1 0.30 0.30 0.40
aaa 0.16
11 www .semtech.com

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