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PDF ICS9112-28 Data sheet ( Hoja de datos )
| Número de pieza | ICS9112-28 | |
| Descripción | Low Skew Output Buffer | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ICS9112-28 (archivo pdf) en la parte inferior de esta página. Total 3 Páginas | ||
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m ICS9112-28Integrated
.coCircuit
Systems, Inc.
Preliminary Product Preview
Low StkaeSwheOeut4tUput BufferGeneral Description
.DaThe ICS9112-28 is a high performance, low skew, low jitter
clock driver. It is designed to distribute high speed clocks in
wPC systems operating at speeds from 0 to 133 MHz.
wwThe ICS9112-28 comes in an eight pin 150 mil SOIC package.
mIt has four output clocks.
Features
• Frequency range 0 - 133 MHz (3.3V)
• Less than 200 ps Jitter between outputs
• Skew controlled outputs
• Skew less than 250 ps between outputs
• Available in 8 pin 150 mil SOIC &
173 mil TSSOP packages.
• 3.3V ±10% operation
.coBlock Diagram
Sheet4UCLK_IN
CLK0
CLK1
CLK2
CLK3
CLK4
Pin Configuration
CLK_IN
CLK0
GND
CLK1
1
2
3
4
8 CLK4
7 VDD
6 CLK3
5 CLK2
8 pin SOIC
.DataPin Descriptions
wPIN NUMBER
w1
2
w om3
.c4
U5
t46
ee7
h8
PIN NAME
CLK_IN
CLK01
GND
CLK11
CLK21
CLK31
VDD
CLK41
taSNotes:
a1. Weak pull-down on all outputs
TYPE
IN
OUT
PWR
OUT
OUT
OUT
PWR
OUT
Input reference frequency.
Buffered clock output
Ground
Buffered clock output
Buffered clock output
Buffered clock output
Power Supply (3.3V)
Buffered clock output
DESCRIPTION
www.D9112-28 RevA02/13/02
PRODUCT PREVIEW documents contain information on new
products in the sampling or preproduction phase of development.
Characteristic data and other specifications are subject to change
without notice.
1 page | ||
| Páginas | Total 3 Páginas | |
| PDF Descargar | [ Datasheet ICS9112-28.PDF ] | |
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