DataSheet.es    


PDF ICS9148-36 Data sheet ( Hoja de datos )

Número de pieza ICS9148-36
Descripción Frequency Generator & Integrated Buffers
Fabricantes Integrated Circuit Systems 
Logotipo Integrated Circuit Systems Logotipo



Hay una vista previa y un enlace de descarga de ICS9148-36 (archivo pdf) en la parte inferior de esta página.


Total 16 Páginas

No Preview Available ! ICS9148-36 Hoja de datos, Descripción, Manual

Integrated
Circuit
Systems, Inc.
ICS9148 - 36
Frequency Generator & Integrated Buffers for PENTIUM/ProTM
General Description
The ICS9148-36 generates all clocks required for high speed
RISC or CISC microprocessor systems such as Intel PentiumPro
or Cyrix. Eight different reference frequency multiplying factors
are externally selectable with smooth frequency transitions.
Spread spectrum may be enabled through I2C programming.
Spread spectrum typically reduces system EMI by 8dB to
10dB. This simplifies EMI qualification without resorting to
board design iterations or costly shielding. The ICS9148-36
employs a proprietary closed loop design, which tightly
controls the percentage of spreading over process and
temperature variations.
Serial programming I2C interface allows changing functions,
stop clock programming and frequency selection. The
SDRAM12 output may be used as a feed back into an off chip
PLL.
Features
• Generates the following system clocks:
- 3 CPU(2.5V/3.3V) upto 100MHz.
- 6 PCI(3.3V) @ 33.3MHz
- 3AGP(3.3V) @ 2 x PCI
- 13 SDRAMs(3.3V) up to 100MHz
- 1 REF (3.3V) @ 14.318MHz
• Skew characteristics:
- CPU – CPU<250ps
- CPU(early) – PCI : 1-4ns, Center 2-6ns
- AGP - PCI: 250ps
• Supports Spread Spectrum modulation & I2C
programming for Power Management, Frequency Select
• Efficient Power management scheme through PCI and
CPU STOP CLOCKS.
• Uses external 14.318MHz crystal
• 48 pin 300mil SSOP.
Block Diagram
Pin Configuration
Power Groups
VDD1 = REF (0:1), X1, X2
VDD2 = PCICLK_F, PCICLK(0:5)
VDD3 = SDRAM (0:12), supply for PLL core
VDD4 =AGP(1:2)
VDD5 = Fixed PLL, 48MHz ,AGP0
VDDL= CPUCLK(0:2)
9148-36 Rev I 11/11/99
48-Pin SSOP
* Internal Pull-up Resistor of
240K to 3.3V on indicated inputs
Pentium is a trademark of Intel Corporation
I2C is a trademark of Philips Corporation
ICS reserves the right to make changes in the device data identified in this
publication without further notice. ICS advises its customers to obtain the latest
version of all device data to verify that any information being relied upon by the
customer is current and accurate.

1 page




ICS9148-36 pdf
ICS9148 - 36
Serial Configuration Command Bitmap
Byte0: Functionality and Frequency Select Register (default = 0)
Bit Description
Must be 0 for normal operation
Bit 7 0 - ±0.25% Spread Spectrum Modulation
1 - ±0.6% Spread Spectrum Modulation
Bit6 Bit5 Bit4 CPU Clock PCI
111 100 33.3
110
95.25
31.75
Bit
6:4
101
100
011
83.3 33.3
75 30
75 37.5
010 68.5 34.25
001 66.8 33.4
000 60 30
AGP
66.6
63.5
66.6
60
75
68.5
66.8
60
0 - Frequency is selected by hardware select,
Bit 3 Latched Inputs
1 - Frequency is selected by Bit 6:4 (above)
Must be 0 for normal operation
Bit 2 0 - Spread Spectrum center spread type.
1 - Spread Spectrum down spread type.
Bit 1
0 - Normal
1 - Spread Spectrum Enabled
Bit 0
0 - Running
1- Tristate all outputs
PWD
0
Note1
0
0
0
0
Note 1. Default at Power-up will be for latched logic inputs
to define frequency. Bits 4, 5, 6 are default to 000,
and if bit 3 is written to a 1 to use Bits 6:4, then
these should be defined to desired frequency at same
write cycle.
Note: PWD = Power-Up Default
I2C is a trademark of Philips Corporation
Byte 1: CPU, Active/Inactive Register
(1 = enable, 0 = disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
-
-
-
40
-
41
43
44
PWD
1
X
X
1
1
1
1
1
Description
(Reserved)
FS2#
FS1#
SDRAM12 (Act/Inact)
(Reserved)
CPUCLK2 (Act/Inact)
CPUCLK1 (Act/Inact)
CPUCLK0 (Act/Inact)
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
Byte 2: PCIActive/Inactive Register
(1 = enable, 0 = disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
-
7
-
13
12
11
10
8
PWD
X
1
X
1
1
1
1
1
Description
CPU3.3#_2.5
PCICLK_F (Act/Inact)
FS0#
PCICLK4 (Act/Inact)
PCICLK3 (Act/Inact)
PCICLK2 (Act/Inact)
PCICLK1 (Act/Inact)
PCICLK0(Act/Inact)
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
5

5 Page





ICS9148-36 arduino
ICS9148 - 36
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to VDD +0.5 V
Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . 115°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70C; Supply Voltage VDD = VDDL = 3.3 V +/-5% (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Input Low Current
Operating
Supply Current
VIH
VIL
IIH
IIL1
IIL2
IDD3.3OP
VIN = VDD
VIN = 0 V; Inputs with no pull-up resistors
VIN = 0 V; Inputs with pull-up resistors
CL = 0 pF; 66.8 MHz
2
VSS-0.3
-5
-200
VDD+0.3
0.8
0.1 5
2.0
-100
100 160
V
V
µA
µA
µA
mA
Input frequency
Input Capacitance1
Fi VDD = 3.3 V;
CIN Logic Inputs
Transition Time1
Settling Time1
Clk Stabilization1
CINX
Ttrans
Ts
TSTAB
X1 & X2 pins
To 1st crossing of target Freq.
From 1st crossing to 1% target Freq.
From VDD = 3.3 V to 1% target Freq.
Skew1
TCPU-PCI1 VT = 1.5 V; f = 66/100 MHz; CPU leads
TCPU-PCI1 VT = 1.5 V; f = 83/75 MHz; CPU leads
TAGP-PCI1 VT = 1.5 V; AGP Leads
1Guaranteed by design, not 100% tested in production.
14.318
MHz
5 pF
27 36 45 pF
2 ms
ms
2 ms
1 2.4 4
ns
1 3.8 4
ns
220 500
ps
Electrical Characteristics - Input/Supply/Com m on Output Param eters
TA = 0 - 70C; Supply Voltage VDD = 3.3 V +/-5%, VDDL = 2.5 V +/-5% (unless otherwise stated)
PAR AM ETER
SYM B OL
C ONDIT IONS
M IN TYP M AX UNITS
Op e ra t i n g
Supply Current
IDD2.5OP CL = 0 pF; 66.8 M Hz
10 20 mA
Skew1
T C P U-P C I1
T C P U-P C I1
T AGP -P C I1
VT = 1.5 V; f = 66/100 M Hz; CPU leads
VT = 1.5 V; f = 83/75 M Hz; CPU leads
VT = 1.5 V; AGP Leads
1 2.4 4
ns
1 3.8 4
ns
220 500
ps
11

11 Page







PáginasTotal 16 Páginas
PDF Descargar[ Datasheet ICS9148-36.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
ICS9148-32Pentium/ProTM System Clock ChipIntegrated Circuit Systems
Integrated Circuit Systems
ICS9148-36Frequency Generator & Integrated BuffersIntegrated Circuit Systems
Integrated Circuit Systems
ICS9148-37Frequency Generator & Integrated BuffersIntegrated Circuit Systems
Integrated Circuit Systems

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar