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PDF TA1317AN Data sheet ( Hoja de datos )
| Número de pieza | TA1317AN | |
| Descripción | Deflection Processor IC for TV | |
| Fabricantes | Toshiba Semiconductor | |
| Logotipo |  |
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TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic
TA1317AN
Deflection Processor IC for TV
TA1317AN
TA1317AN is a deflection processor IC for a large and wide
picture tube.
TA1317AN incorporates EW, vertical distortion correction
circuit and dynamic focus correction circuit. It can control various
functions via I2C BUS line.
Features
• Vertical drive (AC/DC-coupling)
• Picture height adjustment
• Vertical shift adjustment
• Vertical symmetry correction
Weight: 1.22 g (typ.)
• Vertical linearity correction
• Vertical S correction
• Vertical integral correction
• Vertical/Horizontal EHT compensation
• EW drive (parabola/PWM output)
• Picture width
• EW trapezium correction
• EW parabola correction
• EW corner correction (top only/bottom only/top&bottom)
• EW S correction
• Center curve correction (SAW/PAR)
• Parabola output for horizontal and vertical dynamic focus (H/V output independently)
• Horizontal and vertical dynamic focus phase adjustment
• Horizontal and vertical dynamic focus amplitude adjustment
• Horizontal dynamic focus curve characteristic adjustment
• V-ramp limiter circuit
• Analog blanking output
1 2002-09-06
1 page  
Pin
No.
Pin Name
Function
Interface Circuit
11 EW FILTER
Connect phase
compensation filter for
EW output. EW
parabola waveform can
be extracted from this
pin.
11
100 Ω
100 Ω
TA1317AN
Input/Output Signal
7
9
7
12 FBP IN
FBP input pin.
In case of not using
H-DF and EW-PWM
outputs, it should be
open.
500 Ω
12
Th: 2.25 V
Input frequency:
28 k~45 kHz
9
15
13 SDA
7
SDA pin for I2C bus
50 Ω 20 kΩ
SDA
13
ACK
15
Th: 2.25 V
14 SCL
SCL pin for I2C bus
14
15 DIGITAL GND
GND pin for digital block
7
20 kΩ
SCL
15
Th: 2.25 V
5 2002-09-06
5 Page 
Register Name/Number of Bits
V-EHT COMPENSATION/3
Function Explanation
Adjusts the compensated rate for the V-DRIVE by EHT-IN
(pin 3).
000: min
111: max
Output Change
Pin 6
Picture Change
TA1317AN
Preset
Solid line
Dashed line
min
(000)
ANALOG V-BLK STOP PHASE/5
Sets the analog blanking stop phase on pin 20. Inputs the
output from pin 20 to an external BLK-IN of synchronization
IC.
00000: min
10000: center
11111: max
Solid line
Dashed line
center
(10000)
H-EHT COMPENSATION/3
Adjusts the compensated rate for the EW output by EHT-IN
(pin 3).
000: min
111: max
Pin 11
Solid line
Dashed line
min
(000)
ANALOG V-BLK START PHASE/5
Sets the analog blanking start phase on pin 20. Inputs the
output from pin 20 to external BLK-IN of synchronization IC.
00000: min
10000: center
11111: max
Solid line
Dashed line
center
(10000)
V-RAMP LIMIT LEVEL/4
Sets the V-ramp slice level.
0000: OFF
0001: min
1111: max
Sub-address 05-D0 bit comes MSB.
Pin 6
OFF
(0000)
11 2002-09-06
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet TA1317AN.PDF ] | |
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