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PDF NTHD2102P Data sheet ( Hoja de datos )
| Número de pieza | NTHD2102P | |
| Descripción | Power MOSFET Dual P-Channel ChipFET | |
| Fabricantes | ON Semiconductor | |
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NTHD2102P
Power MOSFET
−8.0 V, −4.6 A Dual P−Channel ChipFETt
Features
• Offers an Ultra Low RDS(on) Solution in the ChipFET Package
• Miniature ChipFET Package 40% Smaller Footprint than TSOP−6
making it an Ideal Device for Applications where Board Space is at a
Premium
• Low Profile (<1.1 mm) Allows it to Fit Easily into Extremely Thin
Environments such as Portable Electronics
• Designed to Provide Low RDS(on) at Gate Voltage as Low as 1.8 V, the
Operating Voltage used in many Logic ICs in Portable Electronics
• Simplifies Circuit Design since Additional Boost Circuits for Gate
Voltages are not Required
• Operated at Standard Logic Level Gate Drive, Facilitating Future
Migration to Lower Levels using the same Basic Topology
• Pb−Free Package is Available
Applications
• Optimized for Battery and Load Management Applications in
Portable Equipment such as MP3 Players, Cell Phones, Digital
Cameras, Personal Digital Assistant and other Portable Applications
• Charge Control in Battery Chargers
• Buck and Boost Converters
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage − Continuous
Drain Current − Continuous
− 5 seconds
VDSS
VGS
ID
ID
−8.0
"8.0
−3.4
−4.6
V
V
A
Total Power Dissipation
Continuous @ TA = 25°C
(5 sec) @ TA = 25°C
Continuous @ 85°C
(5 sec) @ 85°C
PD W
1.1
2.1
0.6
1.1
Operating Junction and Storage Temperature TJ, Tstg
Range
−55 to
+150
°C
Continuous Source Current
(Diode Conduction)
Is −1.1 A
Thermal Resistance (Note 1)
Junction−to−Ambient, 5 sec
Junction−to−Ambient, Continuous
RqJA
RqJA
°C/W
60
113
Maximum Lead Temperature for Soldering
TL 260 °C
Purposes, 1/8″ from case for 10 seconds
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.27 in sq
[1 oz] including traces).
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V(BR)DSS
−8.0 V
RDS(on) TYP
50 mW @ −4.5 V
68 mW @ −2.5 V
100 mW @ −1.8 V
ID MAX
−4.6 A
S1 S2
G1 G2
D1
P−Channel MOSFET
D2
P−Channel MOSFET
ChipFET
CASE 1206A
STYLE 2
PIN
CONNECTIONS
MARKING
DIAGRAM
D1 8
D1 7
D2 6
D2 5
1 S1
2 G1
3 S2
4 G2
1
2
3
4
8
7
6
5
D5 = Specific Device Code
M = Month Code
ORDERING INFORMATION
Device
Package
Shipping†
NTHD2102PT1 ChipFET 3000/Tape & Reel
NTHD2102PT1G ChipFET 3000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2004
December, 2004 − Rev. 4
1
Publication Order Number:
NTHD2102P/D
1 page  
NTHD2102P
TYPICAL ELECTRICAL CHARACTERISTICS
2
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
10−4
Single Pulse
Notes: PDM
t1
t2
t1
1. Duty Cycle, D = t 2
2. Per Unit Base = RqJA = 90°C/W
3. TJM − TA = PDMZqJA(t)
4. Surface Mounted
10−3
10−2
10 −1
1
Square Wave Pulse Duration (sec)
10
Figure 11. Normalized Thermal Transient Impedance, Junction−to−Ambient
100
600
2
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
10−4
Single Pulse
10−3
10−2
10 −1
Square Wave Pulse Duration (sec)
1
Figure 12. Normalized Thermal Transient Impedance, Junction−to−Foot
10
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