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PDF LM40CIMTX Data sheet ( Hoja de datos )

Número de pieza LM40CIMTX
Descripción Hardware Monitor with Dual Thermal Diodes and SensorPath Bus
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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May 2004
LM40
Hardware Monitor with Dual Thermal Diodes and
SensorPathBus
General Description
The LM40 is a hardware monitor that measures 3 tempera-
ture zones, 5 voltages and has a single-wire interface com-
patible with National Semiconductor’s SensorPath bus. Sen-
sorPath data is pulse width encoded, thereby allowing the
LM40 to be easily connected to many general purpose
micro-controllers. Several National Semiconductor Super I/O
products include a fully integrated SensorPath master, that
when connected to the LM40 can realize a hardware monitor
function that includes limit checking for measured values,
autonomous fan speed control and many other functions.
The LM40 measures the temperature of its own die as well
as two external devices such as a processor thermal diode
or a diode connected transistor. The LM40 can resolve tem-
peratures up to 255˚C and down to -256˚C. The operating
temperature range of the LM40 is 0˚C to +125˚C. Using Σ∆
ADC it measures +1.2V, +2.5V, +3.3V, +5V and +12V analog
input voltages with internal scaling resistors.The address
programming pin allows two LM40s to be placed on one
SensorPath bus.
Features
n SensorPath Interface
— 2 hardware programmable addresses
n Voltage Monitoring
— 9-bit Σ∆ ADC
— Internal scaling resistors for all inputs
— Monitors +1.2V, +2.5 V, +3.3 V, +5 V and +12 V
n Temperature Sensing
— 2 remote diode temperature sensor zones
— Internal local temperature zone
— 0.5 ˚C resolution
— Measures temperatures up to 140 ˚C
n 14-lead TSSOP package
Key Specifications
n Voltage Measurement Accuracy
n Temperature Sensor Accuracy
n Temperature Range:
— LM40 junction
— Remote Temp Accuracy
n Power Supply Voltage
n Average Power Supply Current
n Conversion Time (all Channels)
±2 % (max)
±3 ˚C (max)
0 ˚C to +85 ˚C
0 ˚C to +100 ˚C
+3.0 V to +3.6 V
0.5 mA (typ)
29.6ms to 1456ms
Applications
n Microprocessor based equipment
(Motherboards, Video Cards, Base-stations, Routers,
ATMs, Point of Sale, …)
n Power Supplies
Typical Application
SensorPathis a trademark of National Semiconductor Corporation
© 2004 National Semiconductor Corporation DS200684
20068401
www.national.com

1 page




LM40CIMTX pdf
TEMPERATURE-TO-DIGITAL CONVERTER CHARACTERISTICS
Parameter
Conditions
Diode Source Current
(VD+ − VD−) = +0.65 V; High Current
Low Current
Diode Source Current High Current to Low Current
Ratio
ANALOG TO DIGITAL CONVERTER CHARACTERISTICS
Symbol
Parameter
Conditions
TUE
Total Unadjusted Error(Note 11)
Resolution
DNL
Differential Non-linearity
Power Supply Sensitivity
Input Resistance, all analog inputs (total resistance
of divider chain)
SWD and ADD DIGITAL INPUT CHARACTERISTICS
Symbol
Parameter
Conditions
VIH SWD Logical High Input Voltage
Typical
(Note 7)
VIL SWD Logical Low Input Voltage
VIH
VIL
VHYST
IL
ADD Logical High Input Voltage
ADD Logical Low Input Voltage
Input Hysteresis
SWD and ADD Input Current
SWD Input Current with V+ Open or
Grounded
GND VIN V+
GND VIN 3.6V,
and V+ Open or
GND
CIN Digital Input Capacitance
SWD DIGITAL OUTPUT CHARACTERISTICS
Symbol
Parameter
Conditions
VOL
IOH
COUT
Open-drain Output Logic “Low”
Voltage
Open-drain Output Off Current
Digital Output Capacitance
I OL = 4mA
I OL = 50µA
300
±0.005
±0.005
10
Typical
(Note 7)
±0.005
10
Typical
(Note 7)
188
11.75
Limits
(Note 8)
280
16
Units
(Limits)
µA (max)
µA
Typical
(Note 7)
1
±1
210
Limits
(Note 8)
±2
9
140
400
Units
(Limit)
%FS
(max)
Bits
LSB
%/V
k(min)
k(max)
Limits
(Note 8)
2.1
V+ + 0.5
0.8
-0.5
90% x V+
10% x V+
±10
Units
(Limit)
V (min)
V (max)
V (max)
V (min)
V (min)
V (max)
mV
µA (max)
µA
Limits
(Note 8)
0.4
0.2
±10
pF
Units
(Limit)
V (max)
V (max)
µA (max)
pF
AC Electrical Characteristics
The following specification apply for V+ = +3.0 VDC to +3.6 VDC, unless otherwise specified. Boldface limits apply for
TA = TJ = TMIN=0˚C to TMAX=85˚C; all other limits TA = TJ = 25˚C. The SensorPath Characteristics conform to the SensorPath
specification revision 0.98. Please refer to that speciation for further details.
Symbol
Parameter
Conditions
Typical Limits
Units
(Note 7) (Note 8) (Limits)
HARDWARE MONITOR CHARACTERISTICS
tCONV
Total Monitoring Cycle Time (Note 13)
All Voltage and
Temperature readings
(Default)
182 163.8 ms (min)
200.2 ms (max)
SensorPath Bus CHARACTERISTICS
tf SWD fall time (Note 16)
Rpull-up=1.25 k±30%,
CL=400 pF
300 ns (max)
5 www.national.com

5 Page





LM40CIMTX arduino
1.0 Functional Description (Continued)
that begin with the label Mout_ depict a drive by the master.
Signal labels that begin with the label Slv_ depict the drive by
the LM40. All other signals show what would be seen when
probing SWD for a particular function (e.g. "Master Wr 0" is
the Master transmitting a Data Bit with the value of 0).
1.2.1 Bus Inactive
The bus is inactive when the SWD signal is high for a period
of at least tINACT. The bus is inactive between each "bit
signal".
1.2.2 Data Bit 0 and 1
All Data Bit signal transfers are started by the master. A Data
Bit 0 is indicated by a "short" pulse; a Data Bit 1 is indicated
by a longer pulse. The direction of the bit is relative to the
master, as follows:
Data Write - a Data Bit transferred from the master to the
LM40.
Data Read - a Data Bit transferred from the LM40 to the
master.
A master must monitor the bus as inactive before starting a
Data Bit (Read or Write).
A master initiates a data write by driving the bus active (low
level) for the period that matches the data value (tMtr0 or tMtr1
for a write of "0" or "1", respectively). The LM40 will detect
that the SWD becomes active within a period of tSFEdet, and
will start measuring the duration that the SWD is active in
order to detect the data value.
A master initiates a data read by driving the bus for a period
of tMtr0. The LM40 will detect that the SWD becomes active
within a period of tSFEdet. For a data read of "0", the LM40
will not drive the SWD. For a data read of "1" the LM40 will
start within tSFEdet to drive the SWD low for a period of
tSLout1. Both master and LM40 must monitor the time at
which the bus becomes inactive to identify a data read of "0"
or "1".
During each Data Bit, both the master and all the LM40s
must monitor the bus (the master for Attention Request and
Reset; the LM40s for Start Bit, Attention Request and Reset)
by measuring the time SWD is active (low). If a Start Bit,
Attention Requests or Reset "bit signal" is detected, the
current "bit signal" is not treated as a Data Bit.
Note that the bit rate of the protocol varies depending on the
data transferred. Thus, the LM40 has a value of "0" in
reserved or unused register bits for bus bandwidth efficiency.
1.2.3 Start Bit
A master must monitor the bus as inactive before beginning
a Start Bit.
The master uses a Start Bit to indicate the beginning of a
transfer. LM40s will monitor for Start Bits all the time, to allow
synchronization of transactions with the master. If a Start Bit
occurs in the middle of a transaction, the LM40 being ad-
dressed will abort the current transaction. In this case the
transaction is not "completed" by the LM40 (see Section 1.3
"SensorPath Bus Transactions").
During each Start Bit, both the master and all the LM40s
must monitor the bus for Attention Request and Reset, by
measuring the time SWD is active (low). If an Attention
Request or Reset condition is detected, the current "bit
signal" is not treated as a Start Bit. The master may attempt
to send the Start Bit at a later time.
1.2.4 Attention Request
The LM40 may initiate an Attention Request when the Sen-
sorPath bus is inactive.
Note that a Data Bit, or Start Bit, from the master may start
simultaneously with an Attention Request from the LM40. In
addition, two LM40s may start an Attention Request simul-
taneously. Due to its length, the Attention Request has pri-
ority over any other "bit signal", except Reset. Conflict with
Data Bits and Start Bits are detected by all the devices, to
allow the bits to be ignored and re-issued by their originator.
The LM40 will either check to see that the bus is inactive
before starting an Attention Request, or start the Attention
Request within the tSFEdet time interval after SWD becomes
active. The LM40 will drive the signal low for tSLoutA time.
After this, both the master and the LM40 must monitor the
bus for a Reset Condition. If a Reset condition is detected,
the current "bit signal" is not treated as an Attention Request.
After Reset, an Attention Request can not be sent before the
master has sent 14 Data Bits on the bus. See Section 1.3.5
for further details on Attention Request generation.
1.2.5 Bus Reset
The LM40 issues a Reset at power up. The master must also
generate a Bus Reset at power-up for at least the minimum
reset time, it must not rely on the LM40. SensorPath puts no
limitation on the maximum reset time of the master. Follow-
ing a Bus Reset, the LM40 may generate an Attention Re-
quest only after the master has sent 14 Data Bits on the bus.
See Section 1.3.5 for further details on Attention Request
generation.
1.3 SensorPath BUS TRANSACTIONS
SensorPath is designed to work with a single master and up
to seven slave devices. Each slave has a unique address.
The LM40 supports up to 2 device addresses that are se-
lected by the state of the address pin ADD. The Register Set
of the LM40 is defined in Section 2.0.
1.3.1 Bus Reset Operation
A Bus Reset Operation is global on the bus and affects only
the communication interface of all the devices connected to
it. The Bus Reset operation does not affect either the con-
tents of the device registers, or device operation, to the
extent defined in LM40 Register Set, see Section 2.0.
The Bus Reset operation is performed by generating a Reset
signal on the bus. The master must apply Reset after power-
up, and before it starts operation. The Reset signal end will
be monitored by all the LM40s on the bus.
After the Reset Signal the SensorPath specification requires
that the master send a sequence of 8 Data Bits with a value
of "0", without a preceding Start Bit. This is required to
enable slaves that "train" their clocks to the bit timing. The
LM40 does not require nor does it support clock training.
11 www.national.com

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