|
|
PDF UPD65948S1 Data sheet ( Hoja de datos )
| Número de pieza | UPD65948S1 | |
| Descripción | VRC4375 System Controller | |
| Fabricantes | NEC Electronics | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de UPD65948S1 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
.com V 4375 System ControllerRC
heet4UData Sheet
ataSDescription
www.D www.DataSheet4U.com U.comFeatures
August 2000
The VRC4375TM system controller is a software-configurable chip that interfaces directly
with an NEC VR43xxTM 64-bit MIPS RISC CPU and PCI bus without external logic or
buffering. The system controller also interfaces with memory (SDRAM, EDO, fast-page
DRAM, and flash/boot ROM) with minimal to no buffering. The memory bus can also
interface with SRAM and general-purpose I/O devices. As an interface with the VR43xx
CPU, the VRC4375 acts as a memory controller, DMA controller, and PCI bridge. As an
interface with PCI agents, the VRC4375 acts as either a PCI bus master or a PCI bus
target. Alternatively, the VRC4375 may be located on a PCI bus add-on board.
Y CPU Interface
• Direct connection to the 66 MHz VR43xx CPU bus
• 3.3-volt I/O
• Support for all VR43xx bus cycles
• Little-endian or big-endian byte ordering modes
Y Memory Interface
• Support for boot ROM/flash memory, base memory, and up to two SIMMs
• SIMM capacity of up to 128 MB
• Programmable address ranges for base and SIMM memory
• Support for two-bank 4/16 Mb devices and four-bank 64/128/256 Mb devices
• CAS latency of 2 or 3 in base memory or SIMM SDRAM, programmable to
support faster new devices or slower legacy devices
• SIMM burst access time programmable in one or two cycle(s)
• 66 MHz memory bus
• 64 MB base memory range: SDRAM and EDO DRAM
• 256 MB SIMM memory range: SDRAM, EDO and fast-page DRAM
• Several speed grades supported within each memory range
• Open DRAM page maintained within base memory
• Eight-word (32-byte) write FIFO (CPU to memory)
• Two-word (8-byte) prefetch FIFO (memory to CPU or memory to PCI)
• On-chip DRAM and SDRAM refresh generation
• Up to 64 MB of write-protectable boot ROM or up to 64 MB of flash ROM
• Flash/boot ROM devices with 8-/16-/32-bit configuration support
• Programmable timing to interface general-purpose I/O device or boot ROM in
the boot ROM address range
www.DataSheet4U13749EU2V0DS00
NEC VRC chipsets are designed and Verified for use with NEC VR Series™ microprocessors. NEC makes
no claim as to the suitability of VRC chipsets for use with non-NEC microprocessors and does not warrant
their performance, suitability or use in such applications.
1
1 page  
Contents
VRC4375 System Controller
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
System Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Reference Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.0 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.0 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.0 Signal Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.0 Registers, Resources, and Implementation . . . . . . . . . . . . . . . . . . . 14
5.0 CPU Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.0 Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.0 PCI Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
8.0 DMA Transfers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
9.0 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
10.0 Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
11.0 Reset Configuration Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
12.0 Endian Mode Software Issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
13.0 Timing Diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
14.0 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
15.0 Package Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
5
5 Page 
VRC4375 System Controller
3.0 Signal Summary
The VRC4375 controller utilizes a 256-pin tape ball grid array (TBGA) package. Table 2
through Table 5 summarize the signal functions. The # symbol following a signal name
indicates an active-low signal.
Table 2. CPU Interface Signals
Signal
EOK#
EValid#
Buffer Type
(NEC
Library) I/O
B001
O
B001
O
Reset
Value
High
High
INT#
MasterClock
(MCLK)
NMI#
B001
B001
B0UC
PValid#
FIU1
O
O
O
I
High
Toggle
High
SysAD[31:0] B00C
SysCmd[4:0] B00C
I/O Hi-Z
I/O Hi-Z
Pull-up/
Pull-down Max imum
Resistance AC
(Ohms)
Load (pF)
20
20
30
20
Maximum
DC
Drive (mA)
12
12
12
12
Description
External ready. Signifies that the controller is
capable of accepting a processor request.
External agent valid. Indicates that the controller
is driving valid information on the SysAD and
SysCmd buses.
Interrupt request
66-MHz master clock to CPU
50 K pull-up 20
6
20 6
20 6
Nonmaskable interrupt; asserted when a PCI
device asserts SERR# or by the Internal counter
Processor valid. Signifies that the VR43xx CPU is
driving valid information on the SysAD and
SysCmd buses.
System address/data bus
System command/data ID bus
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet UPD65948S1.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| UPD65948S1 | VRC4375 System Controller | NEC Electronics |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |