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PDF ICS2694 Data sheet ( Hoja de datos )

Número de pieza ICS2694
Descripción Motherboard Clock Generator
Fabricantes Integrated Circuit Systems 
Logotipo Integrated Circuit Systems Logotipo



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No Preview Available ! ICS2694 Hoja de datos, Descripción, Manual

Integrated
Circuit
Systems, Inc.
ICS2694
Motherboard Clock Generator
Description
The ICS2694 Motherboard Clock Generator is an integrated
circuit using PLL and VCO technology to generate virtually all
the clock signals required in a PC. The use of the device can be
generalized to satisfy the timing needs of most digital systems
by reprogramming the VCO or reconfiguring the counter stages
which derive the output frequencies from the VCO’s.
The primary VCO is customarily used to generate the CPU
clock and is so labeled on the ICS2694. Pre-programmed
frequency sets are listed on page 6. These choices were made
to match the major microprocessor families. CPUSEL (0-3)
allow the user to select the appropriate frequency for the
application.
Due to the filter in the phase-locked loop, the CPUCLK will
move in a linear fashion from one frequency to a newly-
selected frequency without glitches. If a fixed CPUCLK value
is desired, CPUSEL (0-3) may be hard wired to the desired
address with STROBE tied high. (It has a pull-up.) For board
test and debug, pulling OUTPUTE to Ground will tristate all
the outputs.
Features
Low cost - eliminates multiple oscillators and Count
Down Logic
Primary VCO has 16 Mask Programmable frequencies
(normally CPU clock)
Secondary VCO has 1 Mask Programmable frequency
(usually 96 MHz)
Pre-programmed versions for typical PC applications
10 Outputs in addition to the primary CPU clock
Capability to reconfigure counter stages to change the
frequencies of the outputs via mask options
Advanced PLL design
On-chip PLL filters
Very Flexible Architecture
Applications
CPU clock and Co-processor clock
Hard Disk and Floppy Disk clock
Keyboard clock
Serial Port clock
Bus clock
System counting or timing functions
Pin Configuration
OUT2
OUT1
OUT0
OUT9
CPUCLK
VSS
DVDD
STROBE
CPUSEL0
CPUSEL1
CPUSEL2
CPUSEL3
1
2
3
4
5
6
7
8
9
10
11
12
24 OUT3
23 OUT4
22 OUT5
21 OUT6
20 OUT7 (CPUCLK/2)
19 OUT8
18 AVDD
17 XTAL2
16 XTAL1
15 AVSS
14 OUTPUTE
13 CLKIN
24-Pin DIP or SOIC
ICS2694RevA1094

1 page




ICS2694 pdf
ICS2694
AC Timing Characteristics
The following notes apply to all parameters presented in this section:
1. Xtal Frequency = 14.31818 MHz
2. All units are in nanoseconds (ns).
3. Rise and fall time is between 0.8 and 2.0 VDC.
4. Output pin loading = 15pF
5. Duty cycle is measured at 1.4V.
6. Supply Voltage Range = 4.5 to 5.5 volts
7. Temperature Range = 0°C to 70°C
SYMBOL
PARAMETER
Tpw Strobe Pulse Width
Tsu Setup Time Data to Strobe
Thd Hold Time Data to Strobe
Tr Rise Time
Tf Fall Time
- Frequency Error
- Maximum Frequency
MIN
STROBE TIMING
20
10
10
FOUT TIMING
-
-
MAX
NOTES
-
-
-
3 Duty Cycle 40% min. to 60% max.
3 at 80 MHz
0.5 %
135 MHz
Note:
Pattern -004 has rising edges of CPUCLK and CPUCLK/2 matched to ± 2 ns.
STROBE
CPUSEL (0-3)
Tpw
Tsu Thd
5

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