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PDF M512x Data sheet ( Hoja de datos )
| Número de pieza | M512x | |
| Descripción | Mega I/O Controller | |
| Fabricantes | AMD | |
| Logotipo |  |
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Acer Laboratories Inc.
M512x : Mega I/O Controller with PnP
--Preliminary, Confidential, Proprietary--
M512x : Mega I/O Controller with Plug & Play
• Supports Windows 95 Plug and Play
• Supports 2 serial/1 parallel/FDC/RTC/KB and PS/2 mouse functions
• Supports 22 General Purpose I/O pins
• Enhanced ESD/LATCH up to over 4KV/300 mA
• Supports SPP, PS/2, EPP, ECP and 1284 compliance
• Supports 5 GPIO Alternative function pins for Remote Control
• Supports IR via UART1, UART2 and two additional IR pins
• Supports Fast Gate A20 and RC functions
• Supports KBC and RTC enable/disable functions
• Single-chip Notebook/Desktop solution
FEATURES
n Supports Windows 95 Plug-and-Play
n Supports 2 Serial / 1 Parallel / FDC / RTC / KB / PS/2
Mouse functions
n Supports 22 General Purpose I/O pins
- 3 GPIO ports (Ports 1, 2, 3)
- 5 GPIO-ALT function pins for Remote Control (Pins 30-34)
- 2 General Purpose chip select pins (Pins 24-25)
- Supports I2C Control Pins
n 2.88 MB Floppy Disk Controller
- Software compatible with 82077 and supports 16-byte
data FIFOs
- High performance internal data separator
- Supports standard 1 Mbps / 500 Kbps / 300 Kbps / 250
Kbps data rate
- Supports 3 modes of 3.5" FDD (720K/1.2M/1.44MB)
- Swappable drives A and B
n Supports FDC through Parallel Port pins
n Supports AT PS/2 KB and PS/2 Mouse
n Built-in Keyboard Controller and Real Time Clock
n Various modes of Parallel Port
Supports ECP/ EPP / PS/2 / SPP and 1284 Compliance
- IBM PC/XT, PC/AT and PS/2 compatible Bi-directional
parallel port
- Enhanced Parallel Port (EPP) compatible
- Microsoft and Hewlett Packard Extended Capabilities Port
(ECP) compatible
n Serial ports
- Two high performance 16550 compatible UARTs with
send/receive 16-byte FIFOs
- Serial Infra Red (SIR) for wireless communications
- MIDI (Musical Instrument Digital Interface) compatible
n High performance Power Management for FDC, UART
and Parallel Port
n Supports XD-To-SD Bus Buffer and Control Pins
n Supports Enable/Disable KBC and RTC
n Supports Fast Gate A20 and RC function
n Supports External KBC programming pin functions
n Supports additional IrDA and ASK IR Pins
n Supports Phoenix KBC (M5123), AMI KBC(M5125)
n 160-pin PQFP package
07-02-1997 Document Number: 512xDS02.doc
Acer Labs: 7F, 115 Tung Hsing Street, Taipei 110, Taiwan, R.O.C. Tel: 886-(02) 762-8800 Fax: 762-6060
Page 1
1 page  
Acer Laboratories Inc.
M512x : Mega I/O Controller with PnP
--Preliminary, Confidential, Proprietary--
1.3 Register Overview
Table 1-1
I/O Address Decode
Address Range
Base + (0-5) and + (7)
Base + (0-7)
Base + (0-7)
Base + (0-3)
Base + (0-7)
Base + (0-3), + (400-402)
Base + (0-7), + (400-402)
0x60, 0x64
0x70, 0x71
Block Name
Floppy Disk
Serial Port COM1
Serial Port COM2
Parallel port
SPP
EPP
ECP
ECP+EPP+SPP
KBC
RTC
Logical Device
0
4
5
3
Function
IR support
IR support
7
6
07-02-1997 Document Number: 512xDS02.doc
Acer Labs: 7F, 115 Tung Hsing Street, Taipei 110, Taiwan, R.O.C. Tel: 886-(02) 762-8800 Fax: 762-6060
Page 5
5 Page 
Acer Laboratories Inc.
M512x : Mega I/O Controller with PnP
--Preliminary, Confidential, Proprietary--
Table 2-1
M512x Pin Description Table (continued)
Name
Number
Type
Description
BIOS Buffer :
ROMOEJ 39
ROMCSJ 119
RD0-7
111-118
IS
IS
I/O
ROM Output Enable.
ROM Chip Select.
ROM Bus.
Common I/O :
CIO10-11 96-97
I/O Common I/O pin.
I IRQ In.
CIO12
98
I/O Common I/O pin.
I IRRX.
CIO13
99
I/O Common I/O pin.
O IRTX.
CIO14
100
I/O Common I/O pin.
O KBC P21 function.
CIO15
102
I/O Common I/O pin.
O KBC P20 function.
CIO16
103
I/O Common I/O pin.
O I2C_CLK.
CIO17
104
I/O Common I/O pin.
I/O I2C_DAT.
CIO20-24
CIO25
CIO30
CIO31
CIO32
CIO33
CIO34
CIO35
CIO36
CIO37
105-109
110
23
24
25
30
31
32
33
34
I/O
I/O
I
I/O
I
I/O
O
I/O
O
I/O
O
I/O
O
I/O
O
I/O
O
I/O
I
Common I/O pin.
Common I/O pin.
KEYLOCKJ.
Common I/O pin.
KBC_CLK.
Common I/O pin.
General Chip Select decoder CS0J.
Common I/O pin.
General Chip Select decoder CS1J.
Common I/O pin.
Alternative Keyboard Clock.
Common I/O pin.
Alternative Keyboard Data.
Common I/O pin.
Alternative Mouse Clock.
Common I/O pin.
Alternative Mouse Data.
Common I/O pin.
Alternative KBC select.
07-02-1997 Document Number: 512xDS02.doc
Acer Labs: 7F, 115 Tung Hsing Street, Taipei 110, Taiwan, R.O.C. Tel: 886-(02) 762-8800 Fax: 762-6060
Page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet M512x.PDF ] | |
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