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PDF ICE2AS01G Data sheet ( Hoja de datos )

Número de pieza ICE2AS01G
Descripción (ICE2AS01 / ICE2BS01) PWM-FF IC
Fabricantes Infineon Technologies 
Logotipo Infineon Technologies Logotipo



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No Preview Available ! ICE2AS01G Hoja de datos, Descripción, Manual

Datasheet, V2.0, 1 Feb 2002
PWM-FF IC
ICE2AS01/S01G
ICE2BS01/S01G
Off-Line SMPS Current Mode
Controller
Power Management & Supply
Never stop thinking.

1 page




ICE2AS01G pdf
ICE2AS01/G
ICE2BS01/G
1 Pin Configuration and Functionality
1.1 Pin Configuration
1.2 Pin Functionality
Pin Symbol Function
1 N.C.
Not connected
2 SoftS Soft Start & Auto Restart Control
3 FB
Regulation Fedback
4 Isense Controller Current Sense Input
5 Gate Driver Output
6 VCC Controller Supply Voltage
7 GND Controller Ground
8 N.C.
Not connected
Package P-DIP-8-4
G-Package P-DSO-8-3
SoftS (Soft Start & Auto Restart Control)
This pin combines the function of Soft Start in case of
Start Up and Auto Restart Mode and the controlling of
the Auto Restart Mode in case of an error detection.
FB (Feedback)
The information about the regulation is provided by the
FB Pin to the internal Protection Unit and to the internal
PWM-Comparator to control the duty cycle.
Isense (Current Sense)
The Current Sense pin senses the voltage developed
on the series resistor inserted in the source of the
external Power Switch. When Isense reaches the
internal threshold of the Current Limit Comparator, the
Driver output is disabled. By this mean the Over
Current Detection is realized.
Furthermore the current information is provided for the
PWM-Comparator to realize the Current Mode.
N.C.
1
SoftS
2
FB
Isense
3
4
8 N.C.
7 GND
6 VCC
5
Gate
Gate (Driver Output)
The current and slew rate capability of this pin are
suited to drive Power MOSFETs.
VCC (Power supply)
This pin is the positiv supply of the IC. The operating
range is between 8.5V and 21V.
To provide overvoltage protection the driver gets
disabled when the voltage becomes higher than 16.5V
during Start up Phase.
Figure 1
GND (Ground)
Pin Configuration (top view) This pin is the ground of the primary side of the SMPS.
Version 2.0
5 1 Feb 2002

5 Page





ICE2AS01G arduino
ICE2AS01/G
ICE2BS01/G
Functional Description
recovery time. To avoid a premature termination of the
switching pulse this spike is blanked out with a time
constant of tLEB = 220ns. During that time the output of
the Current-Limit Comparator cannot switch off the
gate drive.
VOSC max. Duty Cycle
3.5.2 Propagation Delay Compensation
In case of overcurrent detection the shut down of the
external Power Switch is delayed due to the
propagation delay of the circuit. This delay causes an
overshoot of the peak current Ipeak which depends on
the ratio of dI/dt of the peak current (see Figure 14).
.
VSense
Vcsth
off time
Propagation Delay
ISense
Ipeak2
Ipeak1
ILim it
S ig n a l2
IO vershoot2
S ig n a l1
tPropagation Delay
IO vershoot1
Signal1
Signal2
Figure 15 Dynamic Voltage Threshold Vcsth
t
t
t
Figure 14 Current Limiting
The overshoot of Signal2 is bigger than of Signal1 due
to the steeper rising waveform.
A propagation delay compensation is integrated to
bound the overshoot dependent on dI/dt of the rising
primary current. That means the propagation delay
time between exceeding the current sense threshold
Vcsth and the switch off of the external Power Switch is
compensated over temperature within a range of at
least
.
0
RSense
×
dI peak
dt
1 dVSense
dt
So current limiting is now capable in a very accurate
way (see Figure 16).
E.g. Ipeak = 0.5A with RSense = 2 . Without propagation
delay compensation the current sense threshold is set
to a static voltage level Vcsth=1V. A current ramp of
dI/dt = 0.4A/µs, that means dVSense/dt = 0.8V/µs, and a
propagation delay time of i.e. tPropagation Delay =180ns
leads then to an Ipeak overshoot of 12%. By means of
propagation delay compensation the overshoot is only
about 2% (see Figure 15).
The propagation delay compensation is done by
means of a dynamic threshold voltage Vcsth (see Figure
15). In case of a steeper slope the switch off of the
driver is earlier to compensate the delay.
V
1,3
1,25
1,2
1,15
1,1
1,05
1
0,95
0,9
0
with compensation
without compensation
0,2 0,4 0,6 0,8
1 1,2 1,4 1,6 1,8
dVSense
dt
2V
µs
Figure 16 Overcurrent Shutdown
3.6 PWM-Latch
The oscillator clock output applies a set pulse to the
PWM-Latch when initiating the external Power Switch
conduction. After setting the PWM-Latch can be reset
by the PWM-OP, the Soft-Start-Comparator, the
Current-Limit-Comparator, Comparator C3 or the
Error-Latch of the Protection Unit. In case of reseting
the driver is shut down immediately.
3.7 Driver
The driver is a fast totem pole gate drive, which is
designed to avoid cross conduction currents and which
is equipped with a Zener diode Z1 (see Figure 17) in
order to improve the control of the gate attached power
Version 2.0
11
1 Feb 2002

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