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PDF 89C5122 Data sheet ( Hoja de datos )

Número de pieza 89C5122
Descripción AT89C5122
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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No Preview Available ! 89C5122 Hoja de datos, Descripción, Manual

Features
80C51 Core :
– 6 Clocks per Instruction
– Speed up to 16 MHz
768 Bytes RAM
AT83C5122: 32 Kbytes ROM
AT83C5123: 30 Kbytes ROM
AT85C5122: 32 Kbytes Code RAM and 32 Kbytes ROM
AT89C5122 : 32 Kbytes Flash
AT85EC5122, AT83EC5123, AT83EC5122: Additional 512 Bytes EEPROM (AT24C04)
Multi-protocol Smart Card Interface
Certified According to ISO7816, EMV2000, GIE-CB and WHQM Standards
Asynchronous Protocols T = 0 and T = 1, with Direct and Inverse Modes
Step-up/Down Converter with Programmable Voltage Output: 5V and 3V (60 mA),
1.8V (20 mA)
4 kV ESD Protection (MIL/STD 833 Class 3)
Alternate Card Support with CLK, IO and RST
USB Module with 7 Endpoints Programmable with In or Out Directions and with ISO,
Bulk or Interrupt Transfers
wwUwA.DRaTtawShitehetI4nUte.cgormated Baud Rate Generator (BRG)
8 MHz On-chip Oscillator Analog PLL for 96 MHz Synthesis, Possible 48 MHz Clock
Input
Two 16-bit Timer/Counters: T0 and T1
Hardware Watchdog and Power-fail Detector (PFD)
Idle and Power-down Modes
Self Powered USB
Low Power
30 mA Maximum Operating Current (at 32 MHz X1)
100 µA Maximum Power-down Current at 5.4V (without Smart Card and USB)
Voltage Range: 3.6 to 5.5V
For AT8xC5122 version:
Keyboard Interrupt Interface on Port 5 (8 Bits)
Five 8-bit I/O Ports, One 6-bit
SPI Interface (Master Slave)
Packages: VQFP64, PLCC28
Seven LED Outputs with Programmable Current Sources: 2-4-10 mA
For AT8xC5123 version:
Four LED Outputs with Programmable Current Sources: 2-4-10 mA
Two 8-bit I/O Ports, One 6-bit I/O port, One I/O bit (on LQP32 package)
Packages: LQFP32, PLCC28
C51
Microcontroller
with USB and
Smart Card
Reader
Interfaces
AT83C5122
AT83EC5122
AT85C5122
AT85EC5122
AT89C5122
AT83C5123
AT83EC5123
Preliminary
Rev. 4202B–SCR–07/03
1

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89C5122 pdf
Figure 3. LQFP32 Pinout (only for AT83C5123)
AT8xC5122/23
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DVCC
P1.2/CPRES
P1.1/CC8
P1.5/CRST
P1.3/CC4
P1.4/CCLK
P5.0
VSS
32 31 30 29 28 27 26 25
1 24
2 23
3 22
4 LQFP32 21
5 20
6 19
7 18
8 17
9 10 11 12 1314 15 16
P3.1/TxD
P1.6
P3.0/RxD
P3.5/T1/CRST1
P3.2/INT0/LED0/CIO1
P3.3/INT1
P3.4/LED1/T0
P3.6/LED2
Figure 4. PLCC68 Pinout (Engineering package only for AT85C5122, check availability
with ATMEL sales office)
964 683 762 661 560 459 358 527 516 6585 6574 5636 6552 5614 5603 642961
DVCC
P1.2/CPRES
P1.1/CC8
P5.7
P5.6
P1.5/CRST
P5.5
P5.4
P1.3/CC4
P5.3
P5.2
P1.4/CCLK
P5.1
P5.0
PSEN
VSS
NC
110 48 60
121 47 59
132 46 58
143 45 57
154 44 56
165 43 55
176 42 54
187
PLCC68
41 53
198 40 52
1190 39 51
2101 38 50
2112 3749
2123 3648
2134 35 47
24 3446
25 3345
26 32 44
6247 6238 6229 6310 6301 3529 3538 537453655356 53475338 3592 54105401 4429 43
N/A
P3.1/TxD
P1.6/SS
P2.7/A15
P3.0/RxD
P3.5/T1/CRST1
P3.2/INT0/CIO1
P4.0/MISO
P3.3/INT1
P4.1/MOSI
P3.4/T0
P4.2/SCK
P4.3
P3.6/WR
P4.4
RST
P4.5
4202BSCR07/03
5

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89C5122 arduino
AT8xC5122/23
P1.7
Note:
CCLK1
Alternate smart card clock output
Port51/P
ush-pull
P1.7 is switched automatically to Push-pull when the alternate clock is selected (see
Table 42 on page 48 )
Port 2
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Port 2 has the following functions:
Default function: Port 2 is an 8-bit I/O port.
Alternate function 1: Port 2 is also the multiplexed high-order address during
accesses to external Program and Data Memory. In this application, it uses
strong internal pull-ups when emitting 1s and it can drive CMOS inputs
without external pull-ups.
Port 2 has the following configurations:
Default configuration: Pseudo bi-directional Port51digital input/output with
internal pull-ups.
Configuration 1: Push-pull output
Configuration 2: Low speed output, KB_OUT
Configuration 3: Input with weak pull-up, WPU input
Port 3
Port 3 has the following functions:
Default function: Port 3 is an 8-bit I/O port.
Alternate functions: see table below
Port 3 has the following configurations:
Default configuration: Pseudo bi-directional Port51digital input/output with
internal pull-ups.
Alternate configurations: See Table 4.
Table 4. Port 3 description
Port
P3.0
P3.1
Alternate Functions
Signal Description
RxD
Receiver data input (asynchronous) or data input/output
(synchronous) of the serial interface
TxD
Transmitter data output (asynchronous) or clock output
(synchronous) of the serial interface
Configurations
Mode 1
Mode 2
Push-pull
KB_OUT
Push-pull
KB_OUT
Mode 3
Input WPU
Input WPU
Mode 4
P3.2
P3.3
INT0
INT1
External interrupt 0 input/timer 0 gate control input
External interrupt 1input/timer 1 gate control input
Push-pull
KB_OUT
Input WPU
LED0
P3.4
P3.5
P3.6
T0
T1
WR
P3.7
RD
Timer 0 counter input
Timer 1 counter input
External Data Memory write strobe; latches the data byte
from port 0 into the external data memory
External Data Memory read strobe; Enables the external
data memory. Port 3 can drive CMOS inputs without external
pull-ups
Push-pull
KB_OUT
Input WPU
LED1
LED2
LED3
4202BSCR07/03
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