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PDF DP8480A Data sheet ( Hoja de datos )

Número de pieza DP8480A
Descripción DP8480A 10k ECL to TTL Level Translator with Latch
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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No Preview Available ! DP8480A Hoja de datos, Descripción, Manual

April 1990
DP8480A 10k ECL to TTL Level Translator with Latch
General Description
This circuit translates ECL input levels to TTL output levels
and provides a fall-through latch The TRI-STATE outputs
are designed to drive standard 50 pF loads The strobe and
chip select inputs operate at ECL levels
Features
Y 16-pin DIP
Y TRI-STATE outputs
Y ECL control inputs
Y 8 ns typical propagation delay with 50 pF load
Y Outputs are TRI-STATE during power up down for
glitch free operation
Y 10k ECL input compatible
Logic and Connection Diagram
Truth Table
Dual-In-Line Package
D Q STR
HL
L
LH
L
XQ
H
X Hi-Z
X
H e high level (most positive)
L e low level (most negative)
X e don’t care
CS
L
L
L
H
Order Number DP8480AJ or DP8480AN
See NS Package Number J16A or N16A
Top View
TL F 5861 – 1
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 5861
RRD-B30M105 Printed in U S A

1 page




DP8480A pdf
Physical Dimensions inches (millimeters)
Cavity Dual-In-Line Package (J)
Order Number DP8480AJ
NS Package Number J16A
5

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