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PDF ICS333 Data sheet ( Hoja de datos )

Número de pieza ICS333
Descripción Qtclock Triple Output Clock
Fabricantes Integrated Circuit Systems 
Logotipo Integrated Circuit Systems Logotipo



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ICS333
QTClock Triple Output Clock
Description
Features
The ICS333 is a low cost frequency generator that is
8 pin SOIC package
factory programmable. Using analog/digital
Zero ppm synthesis error
Phase-Locked-Loop (PLL) techniques, the device uses
a standard fundamental mode, inexpensive crystal or
clock input to produce three output clocks. One or more
of the outputs can be programmed to implement
spread spectrum for EMI reductions.
Input crystal frequency from 5 to 27 MHz
Input clock frequency from 3 to 50 MHz
Three output clocks
Spread spectrum capability for low EMI
The device also has a power down feature that
tri-states the clock outputs and turns off the PLL when
mthe PDTS pin is taken low.
oThis datasheet is to be used with the one-page
programming information for the complete specification
.con the device.
Output clock frequencies up to 200 MHz
Duty cycle of 45/55
3.3 V operating voltage (consult ICS for 5V)
Advanced, low power CMOS process
For one output clock (lowest jitter), use the ICS331.
For two output clocks, see the ICS332. For more
than three outputs, see the ICS355 or ICS388.
t4UBlock Diagram
.DataSheeCrystal or
wClock Input
X1/ICLK
wwX2
OTP
ROM
with PLL
D iv ide r
V a lu e s
C ry s ta l
O s c illa to r
PLL
C lo c k
S y n th es is
and
Control
C irc u itry
CLK1
CLK2
CLK3
PDTS (all outputs and PLL)
MDS 333 D
1
Revision 020102
Integrated Circuit Systems, Inc. q 525 Race Street, San Jose, CA 95126 q tel (408) 295-9800 q www.icst.com

1 page




ICS333 pdf
ICS333
QTClock Triple Output Clock
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature 0 to +70°C
Parameter
Symbol
Conditions
Min.
Operating Voltage
VDD
3.15
Supply Current
IDD No load, Note 1
Input High Voltage, PDTS
Input Low Voltage, PDTS
Input High Voltage, ICLK
Input Low Voltage, ICLK
Output High Voltage (CMOS
High)
VIH
VIL
VIH
VIL
VOH
IOH = -8 mA
2
VDD/2+1
VDD-0.4
Output High Voltage
Output Low Voltage
Short Circuit Current
VOH
VOL
IOS
IOH = -12 mA
IOL = 12mA
2.4
Typ.
3.3
TBD
±70
Max. Units
3.47 V
mA
–V
0.4 V
–V
VDD/2-1 V
V
V
0.4 V
mA
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature 0 to +70° C
Parameter
Symbol
Conditions
Min.
Output Rise Time
Output Fall Time
Cycle Jitter (short term jitter)
Input Frequency, crystal input
tOR 0.8 to 2.0V
tOF 2.0 to 0.8V
tja Note 1
5
Input Frequency, clock input
3
Output Frequency
TBD
Output Frequency Synthesis
Error
Note 1
Output Enable Time, PDTS
high to output on
Output Disable Time, PDTS low
to tri-state
Note 1: Values dependent on programming
Typ.
1
1
TBD
0
Max.
27
50
200
TBD
Units
ns
ns
ps
MHz
MHz
MHz
ppm
TBD ms
TBD ms
MDS 333 D
5
Revision 020102
Integrated Circuit Systems, Inc. q 525 Race Street, San Jose, CA 95126 q tel (408) 295-9800 q www.icst.com

5 Page










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