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PDF ICS331 Data sheet ( Hoja de datos )
| Número de pieza | ICS331 | |
| Descripción | Qtclock Single Output Clock | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
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ADVANCE INFORMATION
ICS331
QTClock™ Single Output Clock
Description
Features
The ICS331 is a low cost frequency generator that
• Packaged as 8 pin SOIC
is factory programmable. Using Phase-Locked-
Loop (PLL) techniques, the device uses a standard
fundamental mode, inexpensive crystal or clock
• Zero ppm synthesis error in most applications
• Input crystal frequency from 5 to 27 MHz
input to produce a spread or non-spread output
• Input clock frequency from 3 to 50 MHz
clock.
mThe chip has two select inputs that allow the
selection of up to four different frequencies stored
oin memory. If multiple output selections and
.cspread spectrum are not required, refer to the
ICS300 and ICS301 for lower cost solutions.
UThe device also has an power down feature that
tri states the clock outputs and turns off the PLL
t4when the PDTS pin is taken low.
eThis data sheet is to be used with the one-page
eprogramming information for the complete
specification on the device.
ShBlock Diagram
• Output clock frequencies up to 200 MHz
• Four ROM locations for frequency and spread
selection
• Spread spectrum capability for low EMI
• Duty cycle of 45/55
• 3.3 V operating voltage (consult ICS for 5V)
• Advanced, low power CMOS pr
ataVDD GND
w.DS1, S0
wX1/ICLK
w5-27 MHz
2
Crystal
Oscillator
PLL
Clock Synthesis
Circuitry
and OTP
ROM
Output
Buffer
CLK
crystal or
clock
X2
PDTS
Optional crystal capacitors
MDS 331
1 Revision 112900
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
1 page | ||
| Páginas | Total 4 Páginas | |
| PDF Descargar | [ Datasheet ICS331.PDF ] | |
Hoja de datos destacado
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