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PDF DS1315 Data sheet ( Hoja de datos )
| Número de pieza | DS1315 | |
| Descripción | Phantom Time Chip | |
| Fabricantes | Dallas Semiconducotr | |
| Logotipo |  |
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DS1315
Phantom Time Chip
FEATURES
§ Real time clock keeps track of hundredths of
seconds, seconds, minutes, hours, days, date
of the month, months, and years
§ Adjusts for months with fewer than 31 days
§ Automatic leap year correction valid up to
2100
§ No address space required to communicate
with RTC
§ Provides nonvolatile controller functions for
battery backup of SRAM
§ Supports redundant battery attachment for
high–reliability applications
§ Full ±10% VCC operating range
§ +3.3 volt or +5 volt operation
§ Industrial (–45°C to +85°C) operating
temperature ranges available
§ Drop in replacement for DS1215
ORDERING INFORMATION
DS1315XX-XX
33-3.3 volt operation
5-5 volt operation
blank-commercial temp range
N-industrial temp range
blank-16-pin DIP
S-16-pin SOIC
E-20-pin TSSOP
PIN ASSIGNMENT
X1
X2
WE
BAT1
GND
D
Q
GND
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
16-Pin DIP (300-mil)
X1
X2
WE
BAT1
GND
D
Q
GND
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
16-Pin SOIC (300-mil)
X1
X2
WE
NC
BAT1
GND
NC
D
Q
GND
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
20-Pin TSSOP
VCC1
VCC0
BAT2
RST
OE
CEI
CEO
ROM/RAM
VCC1
VCC0
BAT2
RST
OE
CEI
CEO
ROM/RAM
VCC1
VCC0
BAT2
NC
RST
OE
NC
CEI
CEO
ROM/RAM
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082699
1 page  
DS1315
NONVOLATILE CONTROLLER OPERATION
The operation of the nonvolatile controller circuits within the Time Chip is determined by the level of the
ROM/ RAM select pin. When ROM/ RAM is connected to ground, the controller is set in the RAM mode
and performs the circuit functions required to make CMOS RAM and the timekeeping function
nonvolatile. A switch is provided to direct power from the battery inputs or VCCI to VCCO with a
maximum voltage drop of 0.3 volts. The VCCO output pin is used to supply uninterrupted power to CMOS
SRAM. The DS1315 also performs redundant battery control for high reliability. On power-fail, the
battery with the highest voltage is automatically switched to VCCO. If only one battery is used in the
system, the unused battery input should be connected to ground.
The DS1315 safeguards the Time Chip and RAM data by power-fail detection and write protection.
Power-fail detection occurs when VCCI falls below VPF which is set by an internal bandgap reference. The
DS1315 constantly monitors the VCCI supply pin. When VCCI is less than VPF, power-fail circuitry forces
the chip enable output ( CEO ) to VCCI or VBAT-0.2 volts for external RAM write protection. During
nominal supply conditions, CEO will track CEI with a propagation delay. Internally, the DS1315 aborts
any data transfer in progress without changing any of the Time Chip registers and prevents future access
until VCCI exceeds VPF. A typical RAM/Time Chip interface is illustrated in Figure 3.
When the ROM/ RAM pin is connected to VCCO, the controller is set in the ROM mode. Since ROM is a
read-only device that retains data in the absence of power, battery backup and write protection is not
required. As a result, the chip enable logic will force CEO low when power fails. However, the Time
Chip does retain the same internal nonvolatility and write protection as described in the RAM mode. A
typical ROM/Time Chip interface is illustrated in Figure 4.
DS1315 TO RAM/TIME CHIP INTERFACE Figure 3
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5 Page 
DS1315
DC POWER DOWN ELECTRICAL CHARACTERISTICS
(0°C to 70°C; VCC < 2.97V)
PARAMETER
SYMBOL MIN TYP
MAX
UNITS NOTES
CEO Output Voltage
VCEO
VCCI
or
V8
VBAT1,2
-0.2
VBAT1 OR VBAT2
Battery Current
IBAT
0.3 µA
6
Battery Backup Current
@ VCCO = VBAT-0.2
ICCO2
10 µA
9
AC ELECTRICAL OPERATING CHARACTERISTICS
ROM/RAM = GND
(0°C to 70°C; VCC = 3.3 ± 10%)
PARAMETER
SYMBOL MIN TYP
MAX
UNITS NOTES
Read Cycle Time
CEI Access Time
tRC 120
tCO
ns
100 ns
OE Access Time
tOE
100 ns
CEI to Output Low Z
tCOE
5
ns
OE to Output Low Z
tOEE
5
ns
CEI to Output High Z
tOD
40 ns
OE to Output High Z
tODO
40 ns
Read Recovery
Write Cycle
Write Pulse Width
Write Recovery
Data Setup
Data Hold Time
CEI Pulse Width
tRR 20
tWC 120
tWP 100
tWR 20
tDS 45
tDH 0
tCW 100
ns
ns
ns
ns 4
ns 5
ns 5
ns
OE Pulse Width
tOW 100
ns
RST Pulse Width
tRST 120
ns
11 of 21
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet DS1315.PDF ] | |
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